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-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnCpb.c2
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15MmioMap.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnCpb.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnCpb.c
index c7efe43532..6d28bfe5cb 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnCpb.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnCpb.c
@@ -113,7 +113,7 @@ F15TnIsCpbSupported (
/*---------------------------------------------------------------------------------------*/
/**
- * BSC entry point for for enabling Core Performance Boost.
+ * BSC entry point for enabling Core Performance Boost.
*
* Set up D18F4x15C[BoostSrc] and start the PDMs according to the BKDG.
*
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15MmioMap.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15MmioMap.c
index 77f0b65ea1..1660c493ee 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15MmioMap.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/cpuF15MmioMap.c
@@ -85,7 +85,7 @@ STATIC CONST UINT16 ROMDATA MmioBaseLimitHiRegOffset[MMIO_REG_PAIR_NUM] = {0x180
/*---------------------------------------------------------------------------------------*/
/**
- * BSC entry point for for adding MMIO map
+ * BSC entry point for adding MMIO map
*
* program MMIO base/limit registers
*