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Diffstat (limited to 'src/vendorcode/amd/agesa/f10/Legacy/Proc/hobTransfer.c')
-rw-r--r--src/vendorcode/amd/agesa/f10/Legacy/Proc/hobTransfer.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/vendorcode/amd/agesa/f10/Legacy/Proc/hobTransfer.c b/src/vendorcode/amd/agesa/f10/Legacy/Proc/hobTransfer.c
index 1dbe4406f8..3a3be35235 100644
--- a/src/vendorcode/amd/agesa/f10/Legacy/Proc/hobTransfer.c
+++ b/src/vendorcode/amd/agesa/f10/Legacy/Proc/hobTransfer.c
@@ -120,7 +120,7 @@ CopyHeapToTempRamAtPost (
//
if (AmdHeapRamAddress < 0x100000) {
// Region below 1MB
- // Fixed MTTR region
+ // Fixed MTRR region
// turn on modification bit
LibAmdMsrRead (MSR_SYS_CFG, &MsrData, StdHeader);
MsrData |= 0x80000;
@@ -151,7 +151,7 @@ CopyHeapToTempRamAtPost (
LibAmdMsrWrite (AMD_MTRR_FIX64k_00000, &MsrData, StdHeader);
}
- // Turn on MTTR enable bit and turn off modification bit
+ // Turn on MTRR enable bit and turn off modification bit
LibAmdMsrRead (MSR_SYS_CFG, &MsrData, StdHeader);
MsrData &= 0xFFFFFFFFFFF7FFFFull;
LibAmdMsrWrite (MSR_SYS_CFG, &MsrData, StdHeader);