summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/ibexpeak/smihandler.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/intel/ibexpeak/smihandler.c')
-rw-r--r--src/southbridge/intel/ibexpeak/smihandler.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c
index e83a9de2fb..41f92b5fa0 100644
--- a/src/southbridge/intel/ibexpeak/smihandler.c
+++ b/src/southbridge/intel/ibexpeak/smihandler.c
@@ -8,13 +8,12 @@
#include <cpu/x86/smm.h>
#include <cpu/intel/em64t101_save_state.h>
#include <cpu/intel/model_2065x/model_2065x.h>
+#include <soc/nvs.h>
#include <southbridge/intel/common/finalize.h>
#include <southbridge/intel/common/pmbase.h>
#include <southbridge/intel/ibexpeak/me.h>
#include "pch.h"
-#include "nvs.h"
-
/* We are using PCIe accesses for now
* 1. the chipset can do it
* 2. we don't need to worry about how we leave 0xcf8/0xcfc behind