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-rw-r--r--src/southbridge/amd/amd8111/acpi.c8
-rw-r--r--src/southbridge/amd/amd8111/early_ctrl.c2
2 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/amd/amd8111/acpi.c b/src/southbridge/amd/amd8111/acpi.c
index 0948683b31..da7a1d8086 100644
--- a/src/southbridge/amd/amd8111/acpi.c
+++ b/src/southbridge/amd/amd8111/acpi.c
@@ -168,17 +168,17 @@ static void acpi_init(struct device *dev)
on = SLOW_CPU_OFF;
get_option(&on, "slow_cpu");
if (on) {
- pm10_bar = (pci_read_config16(dev, 0x58)&0xff00);
- outl(((on<<1)+0x10) ,(pm10_bar + 0x10));
+ pm10_bar = (pci_read_config16(dev, 0x58) & 0xff00);
+ outl(((on << 1) + 0x10), (pm10_bar + 0x10));
inl(pm10_bar + 0x10);
on = 8-on;
printk(BIOS_DEBUG, "Throttling CPU %2d.%1.1d percent.\n",
- (on*12)+(on>>1),(on&1)*5);
+ (on * 12) + (on >> 1), (on & 1) * 5);
}
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
pm_base = pci_read_config16(dev, 0x58) & 0xff00;
- printk(BIOS_DEBUG, "pm_base: 0x%04x\n",pm_base);
+ printk(BIOS_DEBUG, "pm_base: 0x%04x\n", pm_base);
#endif
}
diff --git a/src/southbridge/amd/amd8111/early_ctrl.c b/src/southbridge/amd/amd8111/early_ctrl.c
index aa323e45a0..d04646cf85 100644
--- a/src/southbridge/amd/amd8111/early_ctrl.c
+++ b/src/southbridge/amd/amd8111/early_ctrl.c
@@ -68,7 +68,7 @@ void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn)
pci_write_config8(dev, 0x74, 4);
- /* set VFSMAF ( VID/FID System Management Action Field) to 2 */
+ /* set VFSMAF (VID/FID System Management Action Field) to 2 */
pci_write_config32(dev, 0x70, 2<<12);
}