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-rw-r--r--src/soc/intel/apollolake/include/soc/pm.h3
-rw-r--r--src/soc/intel/apollolake/pmutil.c14
2 files changed, 17 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h
index 01efaff43a..aec5e2c0db 100644
--- a/src/soc/intel/apollolake/include/soc/pm.h
+++ b/src/soc/intel/apollolake/include/soc/pm.h
@@ -241,4 +241,7 @@ uint8_t *pmc_mmio_regs(void);
/* STM Support */
uint16_t get_pmbase(void);
+/* Clear PMCON status bits */
+void pmc_clear_pmcon_sts(void);
+
#endif
diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c
index fbb2345653..79ece4b2e4 100644
--- a/src/soc/intel/apollolake/pmutil.c
+++ b/src/soc/intel/apollolake/pmutil.c
@@ -237,3 +237,17 @@ void pmc_soc_set_afterg3_en(const bool on)
reg32 |= SLEEP_AFTER_POWER_FAIL;
write32p(gen_pmcon1, reg32);
}
+
+void pmc_clear_pmcon_sts(void)
+{
+ uint32_t reg_val;
+ uint8_t *addr;
+ addr = pmc_mmio_regs();
+
+ reg_val = read32(addr + GEN_PMCON1);
+ /* Clear SUS_PWR_FLR, GBL_RST_STS, HOST_RST_STS, PWR_FLR bits
+ * while retaining MS4V write-1-to-clear bit */
+ reg_val &= ~(MS4V);
+
+ write32((addr + GEN_PMCON1), reg_val);
+}