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-rw-r--r--src/soc/intel/xeon_sp/include/soc/ddr.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/include/soc/ddr.h b/src/soc/intel/xeon_sp/include/soc/ddr.h
index bb10caaf1f..0b5bdb6b15 100644
--- a/src/soc/intel/xeon_sp/include/soc/ddr.h
+++ b/src/soc/intel/xeon_sp/include/soc/ddr.h
@@ -9,7 +9,6 @@
* currently DDR4 only supports 1.2V, DDR5 only supports 1.1V. */
#define SPD_VDD_DDR4 3
#define SPD_VDD_DDR5 0
-#define SPD_TYPE_DDR5 0x12
/* DDR_*_TCK_MIN are in picoseconds */
#define DDR_800_TCK_MIN 2500