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Diffstat (limited to 'src/soc/intel/tigerlake/fsp_params.c')
-rw-r--r--src/soc/intel/tigerlake/fsp_params.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c
index bdcd357173..926d8eb7b4 100644
--- a/src/soc/intel/tigerlake/fsp_params.c
+++ b/src/soc/intel/tigerlake/fsp_params.c
@@ -114,6 +114,13 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
for (i = 0; i < 8; i++)
params->IomTypeCPortPadCfg[i] = config->IomTypeCPortPadCfg[i];
+ /*
+ * Set FSPS UPD ITbtConnectTopologyTimeoutInMs with value 0. FSP will
+ * evaluate this UPD value and skip sending command. There will be no
+ * delay for command completion.
+ */
+ params->ITbtConnectTopologyTimeoutInMs = 0;
+
/* Chipset Lockdown */
if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT) {
params->PchLockDownGlobalSmi = 0;