2 files changed, 11 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/include/fsp20/soc/romstage.h b/src/soc/intel/skylake/include/fsp20/soc/romstage.h
index d48ac67ab3..08753f1ee9 100644
--- a/src/soc/intel/skylake/include/fsp20/soc/romstage.h
+++ b/src/soc/intel/skylake/include/fsp20/soc/romstage.h
@@ -21,10 +21,16 @@
 #include <fsp/api.h>
 
 asmlinkage void *car_stage_c_entry(void);
-void mainboard_memory_init_params(struct FSPM_UPD *mupd);
-
+void mainboard_memory_init_params(FSPM_UPD *mupd);
 void systemagent_early_init(void);
 int smbus_read_byte(unsigned device, unsigned address);
 int early_spi_read_wpsr(u8 *sr);
 
+/* Board type */
+enum board_type {
+	BOARD_TYPE_MOBILE	= 0,
+	BOARD_TYPE_DESKTOP	= 1,
+	BOARD_TYPE_ULT_ULX	= 5,
+	BOARD_TYPE_SERVER	= 7
+};
 #endif /* _SOC_ROMSTAGE_H_ */
diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h
index e0bf8b0c3a..235ad898e0 100644
--- a/src/soc/intel/skylake/include/soc/pm.h
+++ b/src/soc/intel/skylake/include/soc/pm.h
@@ -183,6 +183,9 @@ uint8_t *pmc_mmio_regs(void);
 /* Get base address of TCO I/O registers. */
 uint16_t smbus_tco_regs(void);
 
+/* Set the DISB after DRAM init */
+void pmc_set_disb(void);
+
 static inline int deep_s3_enabled(void)
 {
 	uint32_t deep_s3_pol;