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Diffstat (limited to 'src/soc/intel/apollolake')
-rw-r--r--src/soc/intel/apollolake/Kconfig31
1 files changed, 17 insertions, 14 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index f9ad4d63f0..91d203eb2c 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -41,18 +41,27 @@ config CPU_SPECIFIC_OPTIONS
select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS
select FSP_STATUS_GLOBAL_RESET_REQUIRED_5
select GENERIC_GPIO_LIB
- select INTEL_DESCRIPTOR_MODE_CAPABLE
- select HAVE_SMI_HANDLER
+ select HAVE_ASAN_IN_ROMSTAGE
+ select HAVE_CF9_RESET_PREPARE
+ select HAVE_FSP_GOP
+ select HAVE_FSP_LOGO_SUPPORT
select HAVE_INTEL_FSP_REPO if !SOC_INTEL_GEMINILAKE
+ select HAVE_SMI_HANDLER
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
+ select INTEL_GMA_ACPI
+ select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
+ select INTEL_GMA_SWSMISCI
select MRC_SETTINGS_PROTECT
select MRC_SETTINGS_VARIABLE_DATA
- select NO_XIP_EARLY_STAGES
select NO_PM_ACPI_TIMER
+ select NO_UART_ON_SUPERIO
+ select NO_XIP_EARLY_STAGES
select PARALLEL_MP_AP_WORK
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
select PCIEXP_CLK_PM
select PCIEXP_L1_SUB_STATE
+ select PLATFORM_USES_FSP2_0
select PMC_INVALID_READ_AFTER_WRITE
select PMC_GLOBAL_RESET_ENABLE_LOCK
select REG_SCRIPT
@@ -97,22 +106,16 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_CSE
select SOC_INTEL_COMMON_BLOCK_SMBUS
select SOC_INTEL_COMMON_FSP_RESET
+ select SOC_INTEL_COMMON_RESET
select SOC_INTEL_NO_BOOTGUARD_MSR
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
- select UDELAY_TSC
select TSC_MONOTONIC_TIMER
- select PLATFORM_USES_FSP2_0
+ select UDELAY_TSC
select UDK_2015_BINDING if !SOC_INTEL_GEMINILAKE
select UDK_2017_BINDING if SOC_INTEL_GEMINILAKE
- select SOC_INTEL_COMMON_RESET
- select HAVE_CF9_RESET_PREPARE
- select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
- select HAVE_FSP_GOP
- select HAVE_FSP_LOGO_SUPPORT
- select NO_UART_ON_SUPERIO
- select INTEL_GMA_ACPI
- select INTEL_GMA_SWSMISCI
- select HAVE_ASAN_IN_ROMSTAGE
+ select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM
+ select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT
+ select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE
# This SoC does not map SPI flash like many previous SoC. Therefore we
# provide a custom media driver that facilitates mapping
select X86_CUSTOM_BOOTMEDIA