diff options
Diffstat (limited to 'src/soc/intel/alderlake/cpu.c')
| -rw-r--r-- | src/soc/intel/alderlake/cpu.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c index 2f5deea208..fafd54d9f1 100644 --- a/src/soc/intel/alderlake/cpu.c +++ b/src/soc/intel/alderlake/cpu.c @@ -242,6 +242,17 @@ enum adl_cpu_type get_adl_cpu_type(void) PCI_DID_INTEL_ADL_N_ID_4, }; + const uint16_t rpl_hx_mch_ids[] = { + PCI_DID_INTEL_RPL_HX_ID_1, + PCI_DID_INTEL_RPL_HX_ID_2, + PCI_DID_INTEL_RPL_HX_ID_3, + PCI_DID_INTEL_RPL_HX_ID_4, + PCI_DID_INTEL_RPL_HX_ID_5, + PCI_DID_INTEL_RPL_HX_ID_6, + PCI_DID_INTEL_RPL_HX_ID_7, + PCI_DID_INTEL_RPL_HX_ID_8, + }; + const uint16_t rpl_s_mch_ids[] = { PCI_DID_INTEL_RPL_S_ID_1, PCI_DID_INTEL_RPL_S_ID_2, @@ -287,6 +298,11 @@ enum adl_cpu_type get_adl_cpu_type(void) return ADL_N; } + for (size_t i = 0; i < ARRAY_SIZE(rpl_hx_mch_ids); i++) { + if (rpl_hx_mch_ids[i] == mchid) + return RPL_HX; + } + for (size_t i = 0; i < ARRAY_SIZE(rpl_p_mch_ids); i++) { if (rpl_p_mch_ids[i] == mchid) return RPL_P; @@ -306,6 +322,7 @@ uint8_t get_supported_lpm_mask(void) return LPM_S0i2_0 | LPM_S0i3_0; case ADL_S: case RPL_S: + case RPL_HX: return LPM_S0i2_0 | LPM_S0i2_1; default: printk(BIOS_ERR, "Unknown ADL CPU type: %d\n", type); |