diff options
Diffstat (limited to 'src/soc/intel/alderlake/chipset.cb')
| -rw-r--r-- | src/soc/intel/alderlake/chipset.cb | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/soc/intel/alderlake/chipset.cb b/src/soc/intel/alderlake/chipset.cb index fc73a89829..60c149a72d 100644 --- a/src/soc/intel/alderlake/chipset.cb +++ b/src/soc/intel/alderlake/chipset.cb @@ -11,7 +11,7 @@ chip soc/intel/alderlake register "power_limits_config[ADL_P_482_CORE]" = "{ .tdp_pl1_override = 28, .tdp_pl2_override = 64, - .tdp_pl4 = 140, + .tdp_pl4 = 90, }" register "power_limits_config[ADL_P_682_28W_CORE]" = "{ @@ -48,6 +48,12 @@ chip soc/intel/alderlake .tdp_pl4 = 123, }" + register "power_limits_config[ADL_P_442_45W_CORE]" = "{ + .tdp_pl1_override = 45, + .tdp_pl2_override = 95, + .tdp_pl4 = 125, + }" + # NOTE: if any variant wants to override this value, use the same format # as register "common_soc_config.pch_thermal_trip" = "value", instead of # putting it under register "common_soc_config" in overridetree.cb file. |