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Diffstat (limited to 'src/soc/intel/alderlake/Kconfig')
| -rw-r--r-- | src/soc/intel/alderlake/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 50c0c0b3e5..74c14a5ef6 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -102,6 +102,15 @@ config CPU_SPECIFIC_OPTIONS select UDK_202005_BINDING select DISPLAY_FSP_VERSION_INFO +config ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR + bool + help + Alder Lake stepping A0 needs a different value for a PMC setting in + the IFD. When this option is selected, coreboot will update the IFD + value at runtime, which allows using an IFD with the new value with + any CPU stepping. To apply this workaround, the IFD region needs to + be writable by the host. + config ALDERLAKE_CAR_ENHANCED_NEM bool default y if !INTEL_CAR_NEM |