diff options
Diffstat (limited to 'src/soc/amd/common/block')
| -rw-r--r-- | src/soc/amd/common/block/cpu/car/cache_as_ram.S | 4 | ||||
| -rw-r--r-- | src/soc/amd/common/block/cpu/noncar/pre_c.S | 6 | ||||
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/post_codes.h | 34 |
3 files changed, 22 insertions, 22 deletions
diff --git a/src/soc/amd/common/block/cpu/car/cache_as_ram.S b/src/soc/amd/common/block/cpu/car/cache_as_ram.S index 372f51517b..2bd3f5061e 100644 --- a/src/soc/amd/common/block/cpu/car/cache_as_ram.S +++ b/src/soc/amd/common/block/cpu/car/cache_as_ram.S @@ -28,7 +28,7 @@ _cache_as_ram_setup: .global bootblock_pre_c_entry bootblock_pre_c_entry: - post_code(POST_BOOTBLOCK_PRE_C_ENTRY) + post_code(POSTCODE_BOOTBLOCK_PRE_C_ENTRY) AMD_ENABLE_STACK @@ -42,7 +42,7 @@ bootblock_pre_c_entry: pushl %eax /* tsc[31:0] */ before_carstage: - post_code(POST_BOOTBLOCK_PRE_C_DONE) + post_code(POSTCODE_BOOTBLOCK_PRE_C_DONE) call bootblock_c_entry /* Never reached */ diff --git a/src/soc/amd/common/block/cpu/noncar/pre_c.S b/src/soc/amd/common/block/cpu/noncar/pre_c.S index 72d778886a..eb556fabd0 100644 --- a/src/soc/amd/common/block/cpu/noncar/pre_c.S +++ b/src/soc/amd/common/block/cpu/noncar/pre_c.S @@ -7,7 +7,7 @@ .global bootblock_resume_entry bootblock_resume_entry: - post_code(POST_BOOTBLOCK_RESUME_ENTRY) + post_code(POSTCODE_BOOTBLOCK_RESUME_ENTRY) /* Get an early timestamp */ rdtsc @@ -24,7 +24,7 @@ bootblock_resume_entry: .global bootblock_pre_c_entry bootblock_pre_c_entry: - post_code(POST_BOOTBLOCK_PRE_C_ENTRY) + post_code(POSTCODE_BOOTBLOCK_PRE_C_ENTRY) #if ENV_X86_64 #include <cpu/x86/64bit/entry64.inc> @@ -57,7 +57,7 @@ bootblock_pre_c_entry: pushl %eax /* tsc[31:0] */ #endif - post_code(POST_BOOTBLOCK_PRE_C_DONE) + post_code(POSTCODE_BOOTBLOCK_PRE_C_DONE) call bootblock_c_entry /* Never reached */ diff --git a/src/soc/amd/common/block/include/amdblocks/post_codes.h b/src/soc/amd/common/block/include/amdblocks/post_codes.h index 5251769731..10056e7b0a 100644 --- a/src/soc/amd/common/block/include/amdblocks/post_codes.h +++ b/src/soc/amd/common/block/include/amdblocks/post_codes.h @@ -3,31 +3,31 @@ #ifndef AMD_BLOCK_POST_CODES_H #define AMD_BLOCK_POST_CODES_H -#define POST_AGESA_AMDINITRESET 0x37 -#define POST_AGESA_AMDINITEARLY 0x38 +#define POSTCODE_AGESA_AMDINITRESET 0x37 +#define POSTCODE_AGESA_AMDINITEARLY 0x38 -#define POST_ROMSTAGE_MAIN 0x40 +#define POSTCODE_ROMSTAGE_MAIN 0x40 -#define POST_AGESA_AMDINITPOST 0x40 -#define POST_AGESA_AMDINITPOST_DONE 0x41 +#define POSTCODE_AGESA_AMDINITPOST 0x40 +#define POSTCODE_AGESA_AMDINITPOST_DONE 0x41 -#define POST_PSP_NOTIFY_DRAM 0x42 -#define POST_PSP_NOTIFY_DRAM_DONE 0x43 +#define POSTCODE_PSP_NOTIFY_DRAM 0x42 +#define POSTCODE_PSP_NOTIFY_DRAM_DONE 0x43 -#define POST_ROMSTAGE_RUN_POSTCAR 0x44 +#define POSTCODE_ROMSTAGE_RUN_POSTCAR 0x44 -#define POST_PSP_LOAD_SMU 0x46 -#define POST_AGESA_AMDINITENV 0x47 -#define POST_AGESA_AMDS3LATERESTORE 0x48 +#define POSTCODE_PSP_LOAD_SMU 0x46 +#define POSTCODE_AGESA_AMDINITENV 0x47 +#define POSTCODE_AGESA_AMDS3LATERESTORE 0x48 -#define POST_AGESA_AMDINITRESUME 0x60 -#define POST_AGESA_AMDINITRESUME_DONE 0x61 +#define POSTCODE_AGESA_AMDINITRESUME 0x60 +#define POSTCODE_AGESA_AMDINITRESUME_DONE 0x61 -#define POST_BOOTBLOCK_SOC_EARLY_INIT 0x90 +#define POSTCODE_BOOTBLOCK_SOC_EARLY_INIT 0x90 -#define POST_BOOTBLOCK_RESUME_ENTRY 0xb0 -#define POST_BOOTBLOCK_PRE_C_ENTRY 0xa0 -#define POST_BOOTBLOCK_PRE_C_DONE 0xa2 +#define POSTCODE_BOOTBLOCK_RESUME_ENTRY 0xb0 +#define POSTCODE_BOOTBLOCK_PRE_C_ENTRY 0xa0 +#define POSTCODE_BOOTBLOCK_PRE_C_DONE 0xa2 #endif |