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-rw-r--r--src/soc/amd/cezanne/include/soc/smu.h11
1 files changed, 4 insertions, 7 deletions
diff --git a/src/soc/amd/cezanne/include/soc/smu.h b/src/soc/amd/cezanne/include/soc/smu.h
index 560c9e4e5e..9216a38e8b 100644
--- a/src/soc/amd/cezanne/include/soc/smu.h
+++ b/src/soc/amd/cezanne/include/soc/smu.h
@@ -3,13 +3,10 @@
#ifndef AMD_CEZANNE_SMU_H
#define AMD_CEZANNE_SMU_H
-/*
- * SMU mailbox register offsets in indirect address space accessed by an index/data pair in
- * D0F00 config space.
- */
-#define REG_ADDR_MESG_ID 0x3b10528
-#define REG_ADDR_MESG_RESP 0x3b10564
-#define REG_ADDR_MESG_ARGS_BASE 0x3b10998
+/* SMU mailbox register offsets in SMN */
+#define SMN_SMU_MESG_ID 0x3b10528
+#define SMN_SMU_MESG_RESP 0x3b10564
+#define SMN_SMU_MESG_ARGS_BASE 0x3b10998
#define SMU_NUM_ARGS 6