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-rw-r--r--src/soc/amd/cezanne/include/soc/smu.h11
-rw-r--r--src/soc/amd/common/block/include/amdblocks/smu.h2
-rw-r--r--src/soc/amd/common/block/smu/smu.c10
-rw-r--r--src/soc/amd/picasso/include/soc/smu.h11
4 files changed, 14 insertions, 20 deletions
diff --git a/src/soc/amd/cezanne/include/soc/smu.h b/src/soc/amd/cezanne/include/soc/smu.h
index 560c9e4e5e..9216a38e8b 100644
--- a/src/soc/amd/cezanne/include/soc/smu.h
+++ b/src/soc/amd/cezanne/include/soc/smu.h
@@ -3,13 +3,10 @@
#ifndef AMD_CEZANNE_SMU_H
#define AMD_CEZANNE_SMU_H
-/*
- * SMU mailbox register offsets in indirect address space accessed by an index/data pair in
- * D0F00 config space.
- */
-#define REG_ADDR_MESG_ID 0x3b10528
-#define REG_ADDR_MESG_RESP 0x3b10564
-#define REG_ADDR_MESG_ARGS_BASE 0x3b10998
+/* SMU mailbox register offsets in SMN */
+#define SMN_SMU_MESG_ID 0x3b10528
+#define SMN_SMU_MESG_RESP 0x3b10564
+#define SMN_SMU_MESG_ARGS_BASE 0x3b10998
#define SMU_NUM_ARGS 6
diff --git a/src/soc/amd/common/block/include/amdblocks/smu.h b/src/soc/amd/common/block/include/amdblocks/smu.h
index eeca3c6e7f..ec5db2c9fc 100644
--- a/src/soc/amd/common/block/include/amdblocks/smu.h
+++ b/src/soc/amd/common/block/include/amdblocks/smu.h
@@ -7,7 +7,7 @@
#include <soc/smu.h> /* SoC-dependent definitions for SMU access */
/* Arguments indexed locations are contiguous; the number is SoC-dependent */
-#define REG_ADDR_MESG_ARG(x) (REG_ADDR_MESG_ARGS_BASE + ((x) * sizeof(uint32_t)))
+#define SMN_SMU_MESG_ARG(x) (SMN_SMU_MESG_ARGS_BASE + ((x) * sizeof(uint32_t)))
struct smu_payload {
uint32_t msg[SMU_NUM_ARGS];
diff --git a/src/soc/amd/common/block/smu/smu.c b/src/soc/amd/common/block/smu/smu.c
index 5e1ad0a737..f48a9d5c45 100644
--- a/src/soc/amd/common/block/smu/smu.c
+++ b/src/soc/amd/common/block/smu/smu.c
@@ -20,7 +20,7 @@ static int32_t smu_poll_response(bool print_command_duration)
stopwatch_init_msecs_expire(&sw, timeout_ms);
do {
- result = smn_read32(REG_ADDR_MESG_RESP);
+ result = smn_read32(SMN_SMU_MESG_RESP);
if (result) {
if (print_command_duration)
printk(BIOS_SPEW, "SMU command consumed %ld usecs\n",
@@ -46,14 +46,14 @@ enum cb_err send_smu_message(enum smu_message_id message_id, struct smu_payload
return CB_ERR;
/* clear response register */
- smn_write32(REG_ADDR_MESG_RESP, 0);
+ smn_write32(SMN_SMU_MESG_RESP, 0);
/* populate arguments */
for (i = 0 ; i < SMU_NUM_ARGS ; i++)
- smn_write32(REG_ADDR_MESG_ARG(i), arg->msg[i]);
+ smn_write32(SMN_SMU_MESG_ARG(i), arg->msg[i]);
/* send message to SMU */
- smn_write32(REG_ADDR_MESG_ID, message_id);
+ smn_write32(SMN_SMU_MESG_ID, message_id);
/* wait until SMU has processed the message and check if it was successful */
if (smu_poll_response(true) != SMU_MESG_RESP_OK)
@@ -61,7 +61,7 @@ enum cb_err send_smu_message(enum smu_message_id message_id, struct smu_payload
/* copy returned values */
for (i = 0 ; i < SMU_NUM_ARGS ; i++)
- arg->msg[i] = smn_read32(REG_ADDR_MESG_ARG(i));
+ arg->msg[i] = smn_read32(SMN_SMU_MESG_ARG(i));
return CB_SUCCESS;
}
diff --git a/src/soc/amd/picasso/include/soc/smu.h b/src/soc/amd/picasso/include/soc/smu.h
index 2dd0e7b6a2..e404a1e086 100644
--- a/src/soc/amd/picasso/include/soc/smu.h
+++ b/src/soc/amd/picasso/include/soc/smu.h
@@ -3,13 +3,10 @@
#ifndef AMD_PICASSO_SMU_H
#define AMD_PICASSO_SMU_H
-/*
- * SMU mailbox register offsets in indirect address space accessed by an index/data pair in
- * D0F00 config space.
- */
-#define REG_ADDR_MESG_ID 0x3b10528
-#define REG_ADDR_MESG_RESP 0x3b10564
-#define REG_ADDR_MESG_ARGS_BASE 0x3b10998
+/* SMU mailbox register offsets in SMN */
+#define SMN_SMU_MESG_ID 0x3b10528
+#define SMN_SMU_MESG_RESP 0x3b10564
+#define SMN_SMU_MESG_ARGS_BASE 0x3b10998
#define SMU_NUM_ARGS 6