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Diffstat (limited to 'src/northbridge/intel/haswell/ram_calc.c')
-rw-r--r--src/northbridge/intel/haswell/ram_calc.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/src/northbridge/intel/haswell/ram_calc.c b/src/northbridge/intel/haswell/ram_calc.c
index 99e7d672b9..01ad50de85 100644
--- a/src/northbridge/intel/haswell/ram_calc.c
+++ b/src/northbridge/intel/haswell/ram_calc.c
@@ -24,12 +24,17 @@
#include <cbmem.h>
#include "haswell.h"
-unsigned long get_top_of_ram(void)
+static uintptr_t smm_region_start(void)
{
/*
* Base of TSEG is top of usable DRAM below 4GiB. The register has
* 1 MiB alignement.
*/
- u32 tom = pci_read_config32(PCI_DEV(0,0,0), TSEG);
- return (unsigned long) tom & ~((1 << 20) - 1);
+ uintptr_t tom = pci_read_config32(PCI_DEV(0,0,0), TSEG);
+ return tom & ~((1 << 20) - 1);
+}
+
+void *cbmem_top(void)
+{
+ return (void *)smm_region_start();
}