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Diffstat (limited to 'src/northbridge/intel/haswell/ram_calc.c')
| -rw-r--r-- | src/northbridge/intel/haswell/ram_calc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/ram_calc.c b/src/northbridge/intel/haswell/ram_calc.c index d51692c758..d3e88f2f84 100644 --- a/src/northbridge/intel/haswell/ram_calc.c +++ b/src/northbridge/intel/haswell/ram_calc.c @@ -24,7 +24,7 @@ static uintptr_t smm_region_start(void) { /* * Base of TSEG is top of usable DRAM below 4GiB. The register has - * 1 MiB alignement. + * 1 MiB alignment. */ uintptr_t tom = pci_read_config32(PCI_DEV(0,0,0), TSEG); return tom & ~((1 << 20) - 1); |