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-rw-r--r--src/mainboard/google/beltino/bootblock.c2
-rw-r--r--src/mainboard/google/beltino/devicetree.cb4
-rw-r--r--src/mainboard/google/beltino/onboard.h2
-rw-r--r--src/mainboard/google/jecht/bootblock.c2
-rw-r--r--src/mainboard/google/jecht/devicetree.cb10
-rw-r--r--src/mainboard/google/jecht/onboard.h2
-rw-r--r--src/mainboard/protectli/vault_kbl/devicetree.cb6
-rw-r--r--src/mainboard/samsung/stumpy/devicetree.cb4
-rw-r--r--src/mainboard/samsung/stumpy/early_init.c16
-rw-r--r--src/mainboard/samsung/stumpy/smihandler.c6
10 files changed, 26 insertions, 28 deletions
diff --git a/src/mainboard/google/beltino/bootblock.c b/src/mainboard/google/beltino/bootblock.c
index a68b03fdf2..4139e383a7 100644
--- a/src/mainboard/google/beltino/bootblock.c
+++ b/src/mainboard/google/beltino/bootblock.c
@@ -9,7 +9,7 @@ void mainboard_config_superio(void)
{
/* Early SuperIO setup */
ite_kill_watchdog(IT8772F_GPIO_DEV);
- it8772f_ac_resume_southbridge(IT8772F_SUPERIO_DEV);
+ ite_ac_resume_southbridge(IT8772F_EC_DEV);
ite_enable_serial(IT8772F_SERIAL_DEV, CONFIG_TTYS0_BASE);
/* Turn on Power LED */
diff --git a/src/mainboard/google/beltino/devicetree.cb b/src/mainboard/google/beltino/devicetree.cb
index cdaab35b54..d96ee118bc 100644
--- a/src/mainboard/google/beltino/devicetree.cb
+++ b/src/mainboard/google/beltino/devicetree.cb
@@ -81,9 +81,9 @@ chip northbridge/intel/haswell
# Skip keyboard init
register "skip_keyboard" = "true"
# Enable PECI on TMPIN3
- register "peci_tmpin" = "3"
+ register "TMPIN3.mode" = "THERMAL_PECI"
# Enable FAN2
- register "fan2_enable" = "true"
+ register "FAN2.mode" = "FAN_SMART_SOFTWARE"
device pnp 2e.0 off end # FDC
device pnp 2e.1 on # Serial Port 1
diff --git a/src/mainboard/google/beltino/onboard.h b/src/mainboard/google/beltino/onboard.h
index 8bd21ce3d5..36295ece68 100644
--- a/src/mainboard/google/beltino/onboard.h
+++ b/src/mainboard/google/beltino/onboard.h
@@ -26,7 +26,7 @@
#define IT8772F_BASE 0x2e
#define IT8772F_SERIAL_DEV PNP_DEV(IT8772F_BASE, IT8772F_SP1)
#define IT8772F_GPIO_DEV PNP_DEV(IT8772F_BASE, IT8772F_GPIO)
-#define IT8772F_SUPERIO_DEV PNP_DEV(IT8772F_BASE, 0)
+#define IT8772F_EC_DEV PNP_DEV(IT8772F_BASE, IT8772F_EC)
#ifndef __ACPI__
void lan_init(void);
diff --git a/src/mainboard/google/jecht/bootblock.c b/src/mainboard/google/jecht/bootblock.c
index db590cf6b4..02b078eefe 100644
--- a/src/mainboard/google/jecht/bootblock.c
+++ b/src/mainboard/google/jecht/bootblock.c
@@ -8,7 +8,7 @@
void bootblock_mainboard_early_init(void)
{
/* Early SuperIO setup */
- it8772f_ac_resume_southbridge(IT8772F_SUPERIO_DEV);
+ ite_ac_resume_southbridge(IT8772F_EC_DEV);
ite_kill_watchdog(IT8772F_GPIO_DEV);
ite_enable_serial(IT8772F_SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/google/jecht/devicetree.cb b/src/mainboard/google/jecht/devicetree.cb
index 1bf8a2aefb..ba8167cda2 100644
--- a/src/mainboard/google/jecht/devicetree.cb
+++ b/src/mainboard/google/jecht/devicetree.cb
@@ -75,15 +75,13 @@ chip soc/intel/broadwell
# Skip keyboard init
register "skip_keyboard" = "true"
# Enable PECI on TMPIN3
- register "peci_tmpin" = "3"
- # Disable use of TMPIN1
- register "tmpin1_mode" = "0"
+ register "TMPIN3.mode" = "THERMAL_PECI"
# Enable Thermal Diode on TMPIN2
- register "tmpin2_mode" = "1"
+ register "TMPIN2.mode" = "THERMAL_DIODE"
# Enable FAN2
- register "fan2_enable" = "true"
+ register "FAN2.mode" = "FAN_SMART_SOFTWARE"
# Default FAN2 speed
- register "fan2_speed" = "0x4d"
+ register "FAN2.smart.pwm_start" = "30"
device pnp 2e.0 off end # FDC
device pnp 2e.1 on # Serial Port 1
diff --git a/src/mainboard/google/jecht/onboard.h b/src/mainboard/google/jecht/onboard.h
index a6ba80a7b3..ae68fb8583 100644
--- a/src/mainboard/google/jecht/onboard.h
+++ b/src/mainboard/google/jecht/onboard.h
@@ -35,7 +35,7 @@ enum {
#define IT8772F_BASE 0x2e
#define IT8772F_SERIAL_DEV PNP_DEV(IT8772F_BASE, IT8772F_SP1)
#define IT8772F_GPIO_DEV PNP_DEV(IT8772F_BASE, IT8772F_GPIO)
-#define IT8772F_SUPERIO_DEV PNP_DEV(IT8772F_BASE, 0)
+#define IT8772F_EC_DEV PNP_DEV(IT8772F_BASE, IT8772F_EC)
/* Write Protect: GPIO58 = GPIO_SPI_WP, active high */
#define GPIO_SPI_WP 58
diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb
index 092115c335..87bc5de38b 100644
--- a/src/mainboard/protectli/vault_kbl/devicetree.cb
+++ b/src/mainboard/protectli/vault_kbl/devicetree.cb
@@ -209,9 +209,9 @@ chip soc/intel/skylake
end
device ref lpc_espi on
chip superio/ite/it8772f
- register "peci_tmpin" = "3"
- register "tmpin1_mode" = "THERMAL_RESISTOR"
- register "tmpin2_mode" = "THERMAL_RESISTOR"
+ register "TMPIN1.mode" = "THERMAL_RESISTOR"
+ register "TMPIN2.mode" = "THERMAL_RESISTOR"
+ register "TMPIN3.mode" = "THERMAL_PECI"
# FAN2 available on fan header but unused
device pnp 2e.0 off end # FDC
device pnp 2e.1 on # Serial Port 1
diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb
index ae3aab5078..853e519263 100644
--- a/src/mainboard/samsung/stumpy/devicetree.cb
+++ b/src/mainboard/samsung/stumpy/devicetree.cb
@@ -88,9 +88,9 @@ chip northbridge/intel/sandybridge
# Skip keyboard init
register "skip_keyboard" = "true"
# Enable PECI on TMPIN3
- register "peci_tmpin" = "3"
+ register "TMPIN3.mode" = "THERMAL_PECI"
# Enable FAN3
- register "fan3_enable" = "true"
+ register "FAN3.mode" = "FAN_SMART_SOFTWARE"
device pnp 2e.0 off end # FDC
device pnp 2e.1 on # Serial Port 1
diff --git a/src/mainboard/samsung/stumpy/early_init.c b/src/mainboard/samsung/stumpy/early_init.c
index 681373c7d8..2719e337e2 100644
--- a/src/mainboard/samsung/stumpy/early_init.c
+++ b/src/mainboard/samsung/stumpy/early_init.c
@@ -12,9 +12,9 @@
#include <southbridge/intel/common/gpio.h>
#include <superio/smsc/lpc47n207/lpc47n207.h>
-#define SUPERIO_DEV PNP_DEV(0x2e, 0)
#define SERIAL_DEV PNP_DEV(0x2e, IT8772F_SP1)
-#define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO)
+#define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO)
+#define EC_DEV PNP_DEV(0x2e, IT8772F_EC)
void mainboard_late_rcba_config(void)
{
@@ -58,17 +58,17 @@ static void setup_sio_gpios(void)
* GPIO10 as USBPWRON12#
* GPIO12 as USBPWRON13#
*/
- it8772f_gpio_setup(SUPERIO_DEV, 1, 0x05, 0x05, 0x00, 0x05, 0x05);
+ it8772f_gpio_setup(GPIO_DEV, 1, 0x05, 0x05, 0x00, 0x05, 0x05);
/*
* GPIO22 as wake SCI#
*/
- it8772f_gpio_setup(SUPERIO_DEV, 2, 0x04, 0x04, 0x00, 0x04, 0x04);
+ it8772f_gpio_setup(GPIO_DEV, 2, 0x04, 0x04, 0x00, 0x04, 0x04);
/*
* GPIO32 as EXTSMI#
*/
- it8772f_gpio_setup(SUPERIO_DEV, 3, 0x04, 0x04, 0x00, 0x04, 0x04);
+ it8772f_gpio_setup(GPIO_DEV, 3, 0x04, 0x04, 0x00, 0x04, 0x04);
/*
* GPIO45 as LED_POWER#
@@ -82,8 +82,8 @@ static void setup_sio_gpios(void)
* GPIO51 as USBPWRON8#
* GPIO52 as USBPWRON1#
*/
- it8772f_gpio_setup(SUPERIO_DEV, 5, 0x06, 0x06, 0x00, 0x06, 0x06);
- it8772f_gpio_setup(SUPERIO_DEV, 6, 0x00, 0x00, 0x00, 0x00, 0x00);
+ it8772f_gpio_setup(GPIO_DEV, 5, 0x06, 0x06, 0x00, 0x06, 0x06);
+ it8772f_gpio_setup(GPIO_DEV, 6, 0x00, 0x00, 0x00, 0x00, 0x00);
}
void mainboard_fill_pei_data(struct pei_data *pei_data)
@@ -117,7 +117,7 @@ void bootblock_mainboard_early_init(void)
setup_sio_gpios();
/* Early SuperIO setup */
- it8772f_ac_resume_southbridge(SUPERIO_DEV);
+ ite_ac_resume_southbridge(EC_DEV);
ite_kill_watchdog(GPIO_DEV);
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}
diff --git a/src/mainboard/samsung/stumpy/smihandler.c b/src/mainboard/samsung/stumpy/smihandler.c
index 500008660f..f9b9d3b8db 100644
--- a/src/mainboard/samsung/stumpy/smihandler.c
+++ b/src/mainboard/samsung/stumpy/smihandler.c
@@ -9,7 +9,7 @@
/* Include for SIO helper functions */
#include <superio/ite/it8772f/it8772f.h>
-#define SUPERIO_DEV PNP_DEV(0x2e, 0)
+#define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO)
/*
* Change LED_POWER# (SIO GPIO 45) state based on sleep type.
@@ -20,14 +20,14 @@ void mainboard_smi_sleep(u8 slp_typ)
switch (slp_typ) {
case ACPI_S3:
case ACPI_S4:
- it8772f_gpio_led(SUPERIO_DEV, 4 /* set */, (0x1 << 5) /* select */,
+ it8772f_gpio_led(GPIO_DEV, 4 /* set */, (0x1 << 5) /* select */,
(0x1 << 5) /* polarity */, (0x1 << 5) /* 1 = pullup */,
(0x1 << 5) /* output */, 0x00, /* 0 = Alternate function */
SIO_GPIO_BLINK_GPIO45, IT8772F_GPIO_BLINK_FREQUENCY_1_HZ);
break;
case ACPI_S5:
- it8772f_gpio_led(SUPERIO_DEV, 4 /* set */, (0x1 << 5) /* select */,
+ it8772f_gpio_led(GPIO_DEV, 4 /* set */, (0x1 << 5) /* select */,
0x00 /* polarity: non-inverting */, 0x00 /* 0 = pulldown */,
(0x1 << 5) /* output */, (0x1 << 5) /* 1 = Simple IO function */,
SIO_GPIO_BLINK_GPIO45, IT8772F_GPIO_BLINK_FREQUENCY_1_HZ);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 07:26:43 +0000