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-rw-r--r--src/mainboard/google/corsola/Kconfig3
-rw-r--r--src/mainboard/google/corsola/Makefile.inc1
-rw-r--r--src/mainboard/google/corsola/display.c113
-rw-r--r--src/mainboard/google/corsola/display.h8
-rw-r--r--src/mainboard/google/corsola/gpio.h12
-rw-r--r--src/mainboard/google/corsola/mainboard.c9
6 files changed, 145 insertions, 1 deletions
diff --git a/src/mainboard/google/corsola/Kconfig b/src/mainboard/google/corsola/Kconfig
index e381502421..702c3fc41c 100644
--- a/src/mainboard/google/corsola/Kconfig
+++ b/src/mainboard/google/corsola/Kconfig
@@ -35,6 +35,9 @@ config BOARD_SPECIFIC_OPTIONS
select EC_GOOGLE_CHROMEEC_SPI
select MAINBOARD_HAS_SPI_TPM_CR50 if VBOOT
select MAINBOARD_HAS_TPM2 if VBOOT
+ select MAINBOARD_HAS_NATIVE_VGA_INIT
+ select HAVE_LINEAR_FRAMEBUFFER
+ select DRIVER_ANALOGIX_ANX7625
config MAINBOARD_DIR
string
diff --git a/src/mainboard/google/corsola/Makefile.inc b/src/mainboard/google/corsola/Makefile.inc
index e1e363c4ed..30ee6c156f 100644
--- a/src/mainboard/google/corsola/Makefile.inc
+++ b/src/mainboard/google/corsola/Makefile.inc
@@ -16,6 +16,7 @@ romstage-y += sdram_configs.c
ramstage-y += memlayout.ld
ramstage-y += boardid.c
ramstage-y += chromeos.c
+ramstage-y += display.c
ramstage-y += mainboard.c
ramstage-y += regulator.c
ramstage-y += reset.c
diff --git a/src/mainboard/google/corsola/display.c b/src/mainboard/google/corsola/display.c
new file mode 100644
index 0000000000..6e4cbe596c
--- /dev/null
+++ b/src/mainboard/google/corsola/display.c
@@ -0,0 +1,113 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <console/console.h>
+#include <delay.h>
+#include <drivers/analogix/anx7625/anx7625.h>
+#include <edid.h>
+#include <gpio.h>
+#include <soc/ddp.h>
+#include <soc/dsi.h>
+#include <soc/gpio_common.h>
+#include <soc/i2c.h>
+#include <soc/mtcmos.h>
+
+#include "display.h"
+#include "gpio.h"
+
+/* Set up backlight control pins as output pin and power-off by default */
+static void configure_backlight_and_bridge(void)
+{
+ /* Disable backlight before turning on bridge */
+ gpio_output(GPIO_AP_EDP_BKLTEN, 0);
+ gpio_output(GPIO_BL_PWM_1V8, 0);
+ gpio_output(GPIO_EN_PP3300_DISP_X, 1);
+
+ /* Turn on bridge */
+ gpio_output(GPIO_EDPBRDG_RST_L, 0);
+ gpio_output(GPIO_EN_PP1000_EDPBRDG, 1);
+ gpio_output(GPIO_EN_PP1800_EDPBRDG, 1);
+ gpio_output(GPIO_EN_PP3300_EDPBRDG, 1);
+ mdelay(14);
+ gpio_output(GPIO_EDPBRDG_PWREN, 1);
+ mdelay(10);
+ gpio_output(GPIO_EDPBRDG_RST_L, 1);
+}
+
+static int anx7625_setup(u8 i2c_bus, struct edid *edid)
+{
+ if (anx7625_init(i2c_bus) < 0) {
+ printk(BIOS_ERR, "%s: Can't init ANX7625 bridge\n", __func__);
+ return -1;
+ }
+ if (anx7625_dp_get_edid(i2c_bus, edid) < 0) {
+ printk(BIOS_ERR, "%s: Can't get panel's edid\n", __func__);
+ return -1;
+ }
+ return 0;
+}
+
+static int bridge_setup(u8 i2c_bus, struct edid *edid)
+{
+ if (CONFIG(BOARD_GOOGLE_KINGLER_COMMON))
+ return anx7625_setup(i2c_bus, edid);
+ else
+ printk(BIOS_ERR, "%s: There is no bridge IC supported\n", __func__);
+
+ return -1;
+}
+
+static int bridge_post_poweron(u8 i2c_bus, struct edid *edid)
+{
+ if (CONFIG(BOARD_GOOGLE_KINGLER_COMMON))
+ return anx7625_dp_start(i2c_bus, edid);
+
+ return 0;
+}
+
+int configure_display(void)
+{
+ struct edid edid;
+ const u8 i2c_bus = I2C0;
+
+ printk(BIOS_INFO, "%s: Starting display init\n", __func__);
+
+ configure_backlight_and_bridge();
+ mtk_i2c_bus_init(i2c_bus, I2C_SPEED_FAST);
+
+ if (bridge_setup(i2c_bus, &edid) < 0) {
+ printk(BIOS_ERR, "%s: Failed to set bridge\n", __func__);
+ return -1;
+ }
+
+ const char *name = edid.ascii_string;
+ if (name[0] == '\0')
+ name = "unknown name";
+ printk(BIOS_INFO, "%s: '%s %s' %dx%d@%dHz\n", __func__,
+ edid.manufacturer_name, name, edid.mode.ha, edid.mode.va,
+ edid.mode.refresh);
+
+ mtcmos_display_power_on();
+ mtcmos_protect_display_bus();
+
+ edid_set_framebuffer_bits_per_pixel(&edid, 32, 0);
+ mtk_ddp_init();
+ u32 mipi_dsi_flags = (MIPI_DSI_MODE_VIDEO |
+ MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_LPM |
+ MIPI_DSI_MODE_EOT_PACKET);
+
+ if (mtk_dsi_init(mipi_dsi_flags, MIPI_DSI_FMT_RGB888, 4, &edid, NULL) < 0) {
+ printk(BIOS_ERR, "%s: Failed in DSI init\n", __func__);
+ return -1;
+ }
+
+ if (bridge_post_poweron(i2c_bus, &edid) < 0) {
+ printk(BIOS_ERR, "%s: Failed to post poweron bridge\n", __func__);
+ return -1;
+ }
+
+ mtk_ddp_mode_set(&edid);
+ fb_new_framebuffer_info_from_edid(&edid, (uintptr_t)0);
+
+ return 0;
+}
diff --git a/src/mainboard/google/corsola/display.h b/src/mainboard/google/corsola/display.h
new file mode 100644
index 0000000000..525422bd40
--- /dev/null
+++ b/src/mainboard/google/corsola/display.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __MAINBOARD_GOOGLE_CORSOLA_DISPLAY_H__
+#define __MAINBOARD_GOOGLE_CORSOLA_DISPLAY_H__
+
+int configure_display(void);
+
+#endif
diff --git a/src/mainboard/google/corsola/gpio.h b/src/mainboard/google/corsola/gpio.h
index c2f789eae1..8f8fb72776 100644
--- a/src/mainboard/google/corsola/gpio.h
+++ b/src/mainboard/google/corsola/gpio.h
@@ -9,7 +9,6 @@
#define GPIO_BT_WAKE_AP_ODL GPIO(EINT6)
#define GPIO_WIFI_INT_ODL GPIO(EINT7)
#define GPIO_DPBRDG_INT_ODL GPIO(EINT8)
-#define GPIO_EDPBRDG_INT_ODL GPIO(EINT9)
#define GPIO_EC_AP_HPD_OD GPIO(EINT10)
#define GPIO_TCHPAD_INT_ODL GPIO(EINT11)
#define GPIO_TCHSCR_INT_1V8_ODL GPIO(EINT12)
@@ -27,6 +26,17 @@
#define GPIO_EN_SPK GPIO(PERIPHERAL_EN3)
#define GPIO_BEEP_ON GPIO(PERIPHERAL_EN4)
+/* GPIOs for display */
+#define GPIO_AP_EDP_BKLTEN GPIO(PERIPHERAL_EN5)
+#define GPIO_BL_PWM_1V8 GPIO(DISP_PWM)
+#define GPIO_EN_PP3300_DISP_X GPIO(PERIPHERAL_EN6)
+#define GPIO_EDPBRDG_RST_L GPIO(LCM_RST)
+#define GPIO_EN_PP1000_EDPBRDG GPIO(ANT_SEL0)
+#define GPIO_EN_PP1800_EDPBRDG GPIO(ANT_SEL1)
+#define GPIO_EN_PP3300_EDPBRDG GPIO(ANT_SEL2)
+#define GPIO_EDPBRDG_INT_ODL GPIO(EINT9)
+#define GPIO_EDPBRDG_PWREN GPIO(DSI_TE)
+
void setup_chromeos_gpios(void);
#endif
diff --git a/src/mainboard/google/corsola/mainboard.c b/src/mainboard/google/corsola/mainboard.c
index fa4aa18597..910d8d6ea9 100644
--- a/src/mainboard/google/corsola/mainboard.c
+++ b/src/mainboard/google/corsola/mainboard.c
@@ -1,12 +1,14 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bl31.h>
+#include <bootmode.h>
#include <console/console.h>
#include <device/device.h>
#include <soc/msdc.h>
#include <soc/spm.h>
#include <soc/usb.h>
+#include "display.h"
#include "gpio.h"
#include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h>
@@ -37,6 +39,13 @@ static void mainboard_init(struct device *dev)
printk(BIOS_ERR, "spm init failed, system suspend may not work\n");
register_reset_to_bl31();
+
+ if (display_init_required()) {
+ if (configure_display() < 0)
+ printk(BIOS_ERR, "%s: Failed to init display\n", __func__);
+ } else {
+ printk(BIOS_INFO, "%s: Skipped display init\n", __func__);
+ }
}
static void mainboard_enable(struct device *dev)
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 12:58:35 +0000