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-rw-r--r--src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb57
-rw-r--r--src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb57
-rw-r--r--src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb51
-rw-r--r--src/mainboard/supermicro/x11-lga1151-series/variants/x11ssw-f/overridetree.cb58
4 files changed, 90 insertions, 133 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb
index 35825f8630..4d54afe828 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb
@@ -15,41 +15,30 @@ chip soc/intel/skylake
# This board has an IGD with no output.
register "PrimaryDisplay" = "Display_Auto"
- # USB configuration
- # USB2/3
- register "usb2_ports[0]" = "USB2_PORT_MID(OC0)"
- register "usb2_ports[1]" = "USB2_PORT_MID(OC0)"
+ register "usb2_ports" = "{
+ [0] = USB2_PORT_MID(OC0), /* USB 2 */
+ [1] = USB2_PORT_MID(OC0), /* USB 3 */
+ [2] = USB2_PORT_MID(OC1), /* USB 4 */
+ [3] = USB2_PORT_MID(OC1), /* USB 5 */
+ [4] = USB2_PORT_MID(OC2), /* USB 0 */
+ [5] = USB2_PORT_MID(OC2), /* USB 1 */
+ [8] = USB2_PORT_MID(OC3), /* USB 9 (3.0) */
+ [9] = USB2_PORT_MID(OC5), /* USB 8 (3.0) */
+ [10] = USB2_PORT_MID(OC4), /* USB 6 (3.0) */
+ [11] = USB2_PORT_MID(OC4), /* USB 7 (3.0) */
+ [12] = USB2_PORT_MID(OC3), /* USB 10 (3.0) */
+ [13] = USB2_PORT_MID(OC_SKIP), /* IPMI USB hub */
+ [14] = USB2_PORT_MID(OC0), /* Unknown */
+ [15] = USB2_PORT_MID(OC0), /* Unknown */
+ }"
- # ?
- register "usb2_ports[14]" = "USB2_PORT_MID(OC0)"
- register "usb2_ports[15]" = "USB2_PORT_MID(OC0)"
-
- # USB4/5
- register "usb2_ports[2]" = "USB2_PORT_MID(OC1)"
- register "usb2_ports[3]" = "USB2_PORT_MID(OC1)"
-
- # USB0/1
- register "usb2_ports[4]" = "USB2_PORT_MID(OC2)"
- register "usb2_ports[5]" = "USB2_PORT_MID(OC2)"
-
- # USB9/10 (USB3.0)
- register "usb2_ports[8]" = "USB2_PORT_MID(OC3)"
- register "usb2_ports[12]" = "USB2_PORT_MID(OC3)"
- register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)"
- register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC3)"
-
- # USB6/7 (USB3.0)
- register "usb2_ports[10]" = "USB2_PORT_MID(OC4)"
- register "usb2_ports[11]" = "USB2_PORT_MID(OC4)"
- register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC4)"
- register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC4)"
-
- # USB8 (USB3.0)
- register "usb2_ports[9]" = "USB2_PORT_MID(OC5)"
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC5)"
-
- # IPMI USB HUB
- register "usb2_ports[13]" = "USB2_PORT_MID(OC_SKIP)"
+ register "usb3_ports" = "{
+ [0] = USB3_PORT_DEFAULT(OC5), /* USB 8 */
+ [1] = USB3_PORT_DEFAULT(OC4), /* USB 6 */
+ [2] = USB3_PORT_DEFAULT(OC4), /* USB 7 */
+ [3] = USB3_PORT_DEFAULT(OC3), /* USB 9 */
+ [4] = USB3_PORT_DEFAULT(OC3), /* USB 10 */
+ }"
device domain 0 on
device pci 01.0 on
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb
index d7f5df8c8b..56b8f9ce7b 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb
@@ -14,41 +14,30 @@ chip soc/intel/skylake
# FIXME: find out why FSP crashes without this
register "PchHdaVcType" = "Vc1"
- # USB configuration
- # USB2/3
- register "usb2_ports[0]" = "USB2_PORT_MID(OC0)"
- register "usb2_ports[1]" = "USB2_PORT_MID(OC0)"
+ register "usb2_ports" = "{
+ [0] = USB2_PORT_MID(OC0), /* USB 2 */
+ [1] = USB2_PORT_MID(OC0), /* USB 3 */
+ [2] = USB2_PORT_MID(OC1), /* USB 4 */
+ [3] = USB2_PORT_MID(OC1), /* USB 5 */
+ [4] = USB2_PORT_MID(OC2), /* USB 0 */
+ [5] = USB2_PORT_MID(OC2), /* USB 1 */
+ [8] = USB2_PORT_MID(OC3), /* USB 9 (3.0) */
+ [9] = USB2_PORT_MID(OC5), /* USB 8 (3.0) */
+ [10] = USB2_PORT_MID(OC4), /* USB 6 (3.0) */
+ [11] = USB2_PORT_MID(OC4), /* USB 7 (3.0) */
+ [12] = USB2_PORT_MID(OC3), /* USB 10 (3.0) */
+ [13] = USB2_PORT_MID(OC_SKIP), /* IPMI USB hub */
+ [14] = USB2_PORT_MID(OC0), /* Unknown */
+ [15] = USB2_PORT_MID(OC0), /* Unknown */
+ }"
- # ?
- register "usb2_ports[14]" = "USB2_PORT_MID(OC0)"
- register "usb2_ports[15]" = "USB2_PORT_MID(OC0)"
-
- # USB4/5
- register "usb2_ports[2]" = "USB2_PORT_MID(OC1)"
- register "usb2_ports[3]" = "USB2_PORT_MID(OC1)"
-
- # USB0/1
- register "usb2_ports[4]" = "USB2_PORT_MID(OC2)"
- register "usb2_ports[5]" = "USB2_PORT_MID(OC2)"
-
- # USB9/10 (USB3.0)
- register "usb2_ports[8]" = "USB2_PORT_MID(OC3)"
- register "usb2_ports[12]" = "USB2_PORT_MID(OC3)"
- register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)"
- register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC3)"
-
- # USB6/7 (USB3.0)
- register "usb2_ports[10]" = "USB2_PORT_MID(OC4)"
- register "usb2_ports[11]" = "USB2_PORT_MID(OC4)"
- register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC4)"
- register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC4)"
-
- # USB8 (USB3.0)
- register "usb2_ports[9]" = "USB2_PORT_MID(OC5)"
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC5)"
-
- # IPMI USB HUB
- register "usb2_ports[13]" = "USB2_PORT_MID(OC_SKIP)"
+ register "usb3_ports" = "{
+ [0] = USB3_PORT_DEFAULT(OC5), /* USB 8 */
+ [1] = USB3_PORT_DEFAULT(OC4), /* USB 6 */
+ [2] = USB3_PORT_DEFAULT(OC4), /* USB 7 */
+ [3] = USB3_PORT_DEFAULT(OC3), /* USB 9 */
+ [4] = USB3_PORT_DEFAULT(OC3), /* USB 10 */
+ }"
device domain 0 on
device pci 01.0 on end # unused
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb
index 5845607142..66206a6100 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb
@@ -11,37 +11,28 @@ chip soc/intel/skylake
register "gen1_dec" = "0x007c0a01" # Super IO SWC
register "gen2_dec" = "0x000c0ca1" # IPMI KCS
- # USB configuration
- # USB0/1
- register "usb2_ports[5]" = "USB2_PORT_MID(OC2)"
- register "usb2_ports[4]" = "USB2_PORT_MID(OC2)"
+ register "usb2_ports" = "{
+ [0] = USB2_PORT_MID(OC3), /* USB 9 (3.0) */
+ [1] = USB2_PORT_MID(OC3), /* USB 8 (3.0) */
+ [2] = USB2_PORT_MID(OC1), /* USB 3 */
+ [3] = USB2_PORT_MID(OC1), /* USB 2 */
+ [4] = USB2_PORT_MID(OC2), /* USB 1 */
+ [5] = USB2_PORT_MID(OC2), /* USB 0 */
+ [6] = USB2_PORT_MID(OC0), /* USB 5 */
+ [7] = USB2_PORT_MID(OC0), /* USB 4 */
+ [8] = USB2_PORT_MID(OC_SKIP), /* IPMI USB HUB */
+ [9] = USB2_PORT_MID(OC5), /* USB 10 (3.0) */
+ [10] = USB2_PORT_MID(OC4), /* USB 7 (3.0) */
+ [11] = USB2_PORT_MID(OC4), /* USB 6 (3.0) */
+ }"
- # USB2/3
- register "usb2_ports[3]" = "USB2_PORT_MID(OC1)"
- register "usb2_ports[2]" = "USB2_PORT_MID(OC1)"
-
- # USB4/5
- register "usb2_ports[7]" = "USB2_PORT_MID(OC0)"
- register "usb2_ports[6]" = "USB2_PORT_MID(OC0)"
-
- # USB6/7 (USB3.0)
- register "usb2_ports[11]" = "USB2_PORT_MID(OC4)"
- register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC4)"
- register "usb2_ports[10]" = "USB2_PORT_MID(OC4)"
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC4)"
-
- # USB8/9 (USB3.0)
- register "usb2_ports[1]" = "USB2_PORT_MID(OC3)"
- register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC3)"
- register "usb2_ports[0]" = "USB2_PORT_MID(OC3)"
- register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)"
-
- # USB10 (USB3.0)
- register "usb2_ports[9]" = "USB2_PORT_MID(OC5)"
- register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC5)"
-
- # IPMI USB HUB
- register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)"
+ register "usb3_ports" = "{
+ [0] = USB3_PORT_DEFAULT(OC4), /* USB 7 */
+ [1] = USB3_PORT_DEFAULT(OC4), /* USB 6 */
+ [2] = USB3_PORT_DEFAULT(OC5), /* USB 10 */
+ [3] = USB3_PORT_DEFAULT(OC3), /* USB 9 */
+ [4] = USB3_PORT_DEFAULT(OC3), /* USB 8 */
+ }"
device domain 0 on
subsystemid 0x15d9 0x0896 inherit
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssw-f/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssw-f/overridetree.cb
index 6984b834ed..c5c2778a20 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssw-f/overridetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssw-f/overridetree.cb
@@ -15,43 +15,31 @@ chip soc/intel/skylake
# This board has an IGD with no output.
register "PrimaryDisplay" = "Display_Auto"
- # USB configuration
# NB: Overcurrent OCx values untested
- # USB2/3
- register "usb2_ports[8]" = "USB2_PORT_MID(OC0)"
- register "usb2_ports[9]" = "USB2_PORT_MID(OC0)"
+ register "usb2_ports" = "{
+ [0] = USB2_PORT_MID(OC3), /* USB 6 (3.0) */
+ [1] = USB2_PORT_MID(OC3), /* USB 7 (3.0) */
+ [2] = USB2_PORT_MID(OC2), /* USB 0 */
+ [3] = USB2_PORT_MID(OC2), /* USB 1 */
+ [4] = USB2_PORT_MID(OC1), /* USB 4 */
+ [5] = USB2_PORT_MID(OC1), /* USB 5 */
+ [8] = USB2_PORT_MID(OC0), /* USB 2 */
+ [9] = USB2_PORT_MID(OC0), /* USB 3 */
+ [10] = USB2_PORT_MID(OC5), /* USB 9 (3.0) */
+ [11] = USB2_PORT_MID(OC5), /* USB 10 (3.0) */
+ [12] = USB2_PORT_MID(OC4), /* USB 8 (3.0) */
+ [13] = USB2_PORT_MID(OC_SKIP), /* IPMI USB hub */
+ [14] = USB2_PORT_MID(OC0), /* Unknown */
+ [15] = USB2_PORT_MID(OC0), /* Unknown */
+ }"
- # ?
- register "usb2_ports[14]" = "USB2_PORT_MID(OC0)"
- register "usb2_ports[15]" = "USB2_PORT_MID(OC0)"
-
- # USB4/5
- register "usb2_ports[4]" = "USB2_PORT_MID(OC1)"
- register "usb2_ports[5]" = "USB2_PORT_MID(OC1)"
-
- # USB0/1
- register "usb2_ports[2]" = "USB2_PORT_MID(OC2)"
- register "usb2_ports[3]" = "USB2_PORT_MID(OC2)"
-
- # USB6/7 (USB3.0)
- register "usb2_ports[0]" = "USB2_PORT_MID(OC3)"
- register "usb2_ports[1]" = "USB2_PORT_MID(OC3)"
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC3)"
- register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)"
-
- # USB8 (USB3.0)
- register "usb2_ports[12]" = "USB2_PORT_MID(OC4)"
- register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC4)"
-
- # USB9/10 (USB3.0)
- register "usb2_ports[10]" = "USB2_PORT_MID(OC5)"
- register "usb2_ports[11]" = "USB2_PORT_MID(OC5)"
- register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC5)"
- register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC5)"
-
-
- # IPMI USB HUB
- register "usb2_ports[13]" = "USB2_PORT_MID(OC_SKIP)"
+ register "usb3_ports" = "{
+ [0] = USB3_PORT_DEFAULT(OC3), /* USB 6 */
+ [1] = USB3_PORT_DEFAULT(OC3), /* USB 7 */
+ [2] = USB3_PORT_DEFAULT(OC4), /* USB 8 */
+ [3] = USB3_PORT_DEFAULT(OC5), /* USB 9 */
+ [4] = USB3_PORT_DEFAULT(OC5), /* USB 10 */
+ }"
device domain 0 on
device pci 01.0 on