diff options
Diffstat (limited to 'src/mainboard/starlabs/starbook/variants/tgl/devtree.c')
| -rw-r--r-- | src/mainboard/starlabs/starbook/variants/tgl/devtree.c | 22 |
1 files changed, 10 insertions, 12 deletions
diff --git a/src/mainboard/starlabs/starbook/variants/tgl/devtree.c b/src/mainboard/starlabs/starbook/variants/tgl/devtree.c index 4013d7758f..b6422f53a8 100644 --- a/src/mainboard/starlabs/starbook/variants/tgl/devtree.c +++ b/src/mainboard/starlabs/starbook/variants/tgl/devtree.c @@ -23,32 +23,30 @@ void devtree_update(void) struct device *tbt_pci_dev = pcidev_on_root(0x07, 0); struct device *tbt_dma_dev = pcidev_on_root(0x0d, 2); + uint8_t performance_scale = 100; /* Update PL1 & PL2 based on CMOS settings */ switch (get_power_profile(PP_POWER_SAVER)) { case PP_POWER_SAVER: - soc_conf_2core->tdp_pl1_override = 15; - soc_conf_4core->tdp_pl1_override = 15; - soc_conf_2core->tdp_pl2_override = 15; - soc_conf_4core->tdp_pl2_override = 15; + performance_scale -= 25; cfg->tcc_offset = 30; break; case PP_BALANCED: - soc_conf_2core->tdp_pl1_override = 15; - soc_conf_4core->tdp_pl1_override = 15; - soc_conf_2core->tdp_pl2_override = 25; - soc_conf_4core->tdp_pl2_override = 25; + /* Use the Intel defaults */ cfg->tcc_offset = 25; break; case PP_PERFORMANCE: - soc_conf_2core->tdp_pl1_override = 28; - soc_conf_4core->tdp_pl1_override = 28; - soc_conf_2core->tdp_pl2_override = 40; - soc_conf_4core->tdp_pl2_override = 40; + performance_scale += 25; cfg->tcc_offset = 20; break; } + soc_conf_2core->tdp_pl1_override = (soc_conf_2core->tdp_pl1_override * performance_scale) / 100; + soc_conf_4core->tdp_pl1_override = (soc_conf_4core->tdp_pl2_override * performance_scale) / 100; + + soc_conf_2core->tdp_pl2_override = (soc_conf_2core->tdp_pl1_override * performance_scale) / 100; + soc_conf_4core->tdp_pl2_override = (soc_conf_4core->tdp_pl2_override * performance_scale) / 100; + /* Set PL4 to 1.0C */ soc_conf_2core->tdp_pl4 = 65; soc_conf_4core->tdp_pl4 = 65; |