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Diffstat (limited to 'src/mainboard/intel/tglrvp/variants/tglrvp_up4')
-rw-r--r--src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
index 17af01aaeb..cd5493bc30 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
@@ -123,9 +123,6 @@ chip soc/intel/tigerlake
# Enable DPTF
register "dptf_enable" = "1"
- # Enable Processor Thermal Control
- register "Device4Enable" = "1"
-
# Add PL1 and PL2 values
register "power_limits_config[POWER_LIMITS_U_2_CORE]" = "{
.tdp_pl1_override = 9,