diff options
Diffstat (limited to 'src/mainboard/intel/adlrvp')
| -rw-r--r-- | src/mainboard/intel/adlrvp/devicetree.cb | 3 | ||||
| -rw-r--r-- | src/mainboard/intel/adlrvp/devicetree_m.cb | 3 | ||||
| -rw-r--r-- | src/mainboard/intel/adlrvp/devicetree_n.cb | 3 |
3 files changed, 0 insertions, 9 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb index 8f60e42970..9bd99b18f7 100644 --- a/src/mainboard/intel/adlrvp/devicetree.cb +++ b/src/mainboard/intel/adlrvp/devicetree.cb @@ -8,9 +8,6 @@ chip soc/intel/alderlake register "pmc_gpe0_dw1" = "GPP_D" register "pmc_gpe0_dw2" = "GPP_E" - # Enable HECI1 interface - register "HeciEnabled" = "1" - # FSP configuration # Enable CNVi BT diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb index ab9983095b..c637ec3d54 100644 --- a/src/mainboard/intel/adlrvp/devicetree_m.cb +++ b/src/mainboard/intel/adlrvp/devicetree_m.cb @@ -18,9 +18,6 @@ chip soc/intel/alderlake register "pmc_gpe0_dw1" = "GPP_D" register "pmc_gpe0_dw2" = "GPP_E" - # Enable HECI1 communication - register "HeciEnabled" = "1" - # FSP configuration register "usb2_ports[0]" = "USB2_PORT_MID(OC1)" # Type-C port 0 register "usb2_ports[1]" = "USB2_PORT_MID(OC1)" # Type-C port 1 diff --git a/src/mainboard/intel/adlrvp/devicetree_n.cb b/src/mainboard/intel/adlrvp/devicetree_n.cb index cec0422849..f013596b06 100644 --- a/src/mainboard/intel/adlrvp/devicetree_n.cb +++ b/src/mainboard/intel/adlrvp/devicetree_n.cb @@ -8,9 +8,6 @@ chip soc/intel/alderlake register "pmc_gpe0_dw1" = "GPP_D" register "pmc_gpe0_dw2" = "GPP_E" - # Enable HECI1 interface - register "HeciEnabled" = "1" - # FSP configuration # Enable CNVi BT |