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Diffstat (limited to 'src/mainboard/google/reef/variants/sand')
-rw-r--r--src/mainboard/google/reef/variants/sand/devicetree.cb12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/google/reef/variants/sand/devicetree.cb b/src/mainboard/google/reef/variants/sand/devicetree.cb
index a6692e6bf7..e53af885e0 100644
--- a/src/mainboard/google/reef/variants/sand/devicetree.cb
+++ b/src/mainboard/google/reef/variants/sand/devicetree.cb
@@ -4,13 +4,13 @@ chip soc/intel/apollolake
device lapic 0 on end
end
- register "pcie_rp0_clkreq_pin" = "0" # wifi/bt
+ register "pcie_rp_clkreq_pin[0]" = "0" # wifi/bt
# Disable unused clkreq of PCIe root ports
- register "pcie_rp1_clkreq_pin" = "CLKREQ_DISABLED"
- register "pcie_rp2_clkreq_pin" = "CLKREQ_DISABLED"
- register "pcie_rp3_clkreq_pin" = "CLKREQ_DISABLED"
- register "pcie_rp4_clkreq_pin" = "CLKREQ_DISABLED"
- register "pcie_rp5_clkreq_pin" = "CLKREQ_DISABLED"
+ register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"
+ register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED"
+ register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED"
+ register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"
+ register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
# GPIO for PERST_0
# If the Board has PERST_0 signal, assign the GPIO