summaryrefslogtreecommitdiff
path: root/src/mainboard/google/cyan/variants/terra
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/google/cyan/variants/terra')
-rw-r--r--src/mainboard/google/cyan/variants/terra/romstage.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/google/cyan/variants/terra/romstage.c b/src/mainboard/google/cyan/variants/terra/romstage.c
index 5bdd7fe04f..531f1ead15 100644
--- a/src/mainboard/google/cyan/variants/terra/romstage.c
+++ b/src/mainboard/google/cyan/variants/terra/romstage.c
@@ -13,7 +13,6 @@ void variant_memory_init_params(MEMORY_INIT_UPD *memory_params)
* RAMID = 11 - 4GiB Micron MT52L256M32D1PF-107
*/
if (ram_id == 3 || ram_id == 11) {
-
/*
* For new micron part, it requires read/receive
* enable training before sending cmds to get MR8.