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Diffstat (limited to 'src/mainboard/google/brya/variants/gimble/overridetree.cb')
-rw-r--r--src/mainboard/google/brya/variants/gimble/overridetree.cb48
1 files changed, 42 insertions, 6 deletions
diff --git a/src/mainboard/google/brya/variants/gimble/overridetree.cb b/src/mainboard/google/brya/variants/gimble/overridetree.cb
index 408d380ce2..88f4b07f17 100644
--- a/src/mainboard/google/brya/variants/gimble/overridetree.cb
+++ b/src/mainboard/google/brya/variants/gimble/overridetree.cb
@@ -264,13 +264,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref tcss_usb3_port3 on end
end
end
@@ -282,13 +294,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref usb2_port2 on end
end
chip drivers/usb/acpi
@@ -300,7 +324,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb2_port8 on end
end
chip drivers/usb/acpi
@@ -313,7 +343,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb3_port2 on end
end
end