diff options
Diffstat (limited to 'src/mainboard/amd/serengeti_cheetah_fam10/Config.lb')
| -rw-r--r-- | src/mainboard/amd/serengeti_cheetah_fam10/Config.lb | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb b/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb index 3689ba2abc..d01785a1cf 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb +++ b/src/mainboard/amd/serengeti_cheetah_fam10/Config.lb @@ -129,7 +129,6 @@ if HAVE_ACPI_TABLES end end -if USE_DCACHE_RAM makedefine CACHE_AS_RAM_AUTO_C:=cache_as_ram_auto.c if CONFIG_USE_INIT @@ -149,7 +148,6 @@ if USE_DCACHE_RAM end end -end if USE_FAILOVER_IMAGE else @@ -179,7 +177,6 @@ else end mainboardinit cpu/x86/32bit/entry32.inc -if USE_DCACHE_RAM if CONFIG_USE_INIT ldscript /cpu/x86/32bit/entry32.lds end @@ -187,7 +184,6 @@ if USE_DCACHE_RAM if CONFIG_USE_INIT ldscript /cpu/amd/car/cache_as_ram.lds end -end ## ## Build our reset vector (This is where coreboot is entered) @@ -217,12 +213,10 @@ end mainboardinit arch/i386/lib/id.inc ldscript /arch/i386/lib/id.lds -if USE_DCACHE_RAM ## ## Setup Cache-As-Ram ## mainboardinit cpu/amd/car/cache_as_ram.inc -end ### ### This is the early phase of coreboot startup @@ -231,15 +225,11 @@ end ### if HAVE_FAILOVER_BOOT if USE_FAILOVER_IMAGE - if USE_DCACHE_RAM ldscript /arch/i386/lib/failover_failover.lds - end end else if USE_FALLBACK_IMAGE - if USE_DCACHE_RAM ldscript /arch/i386/lib/failover.lds - end end end @@ -250,16 +240,12 @@ end ## ## Setup RAM ## -if USE_DCACHE_RAM - if CONFIG_USE_INIT initobject cache_as_ram_auto.o else mainboardinit ./cache_as_ram_auto.inc end -end - ## ## Include the secondary Configuration files ## |