diff options
Diffstat (limited to 'src/mainboard/amd/gardenia/bootblock')
| -rw-r--r-- | src/mainboard/amd/gardenia/bootblock/bootblock.c | 27 | ||||
| -rw-r--r-- | src/mainboard/amd/gardenia/bootblock/gpio.c | 57 |
2 files changed, 27 insertions, 57 deletions
diff --git a/src/mainboard/amd/gardenia/bootblock/bootblock.c b/src/mainboard/amd/gardenia/bootblock/bootblock.c new file mode 100644 index 0000000000..dae59b78d8 --- /dev/null +++ b/src/mainboard/amd/gardenia/bootblock/bootblock.c @@ -0,0 +1,27 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <bootblock_common.h> +#include <soc/southbridge.h> + +#include "../gpio.h" + +void bootblock_mainboard_init(void) +{ + size_t num_gpios; + const struct soc_amd_stoneyridge_gpio *gpios; + gpios = early_gpio_table(&num_gpios); + sb_program_gpios(gpios, num_gpios); +} diff --git a/src/mainboard/amd/gardenia/bootblock/gpio.c b/src/mainboard/amd/gardenia/bootblock/gpio.c deleted file mode 100644 index 54d966e251..0000000000 --- a/src/mainboard/amd/gardenia/bootblock/gpio.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015-2016 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <amdblocks/agesawrapper.h> -#include <amdblocks/BiosCallOuts.h> -#include <soc/southbridge.h> -#include <stdlib.h> -#include <soc/gpio.h> - -/* - * As a rule of thumb, GPIO pins used by coreboot should be initialized at - * bootblock while GPIO pins used only by the OS should be initialized at - * ramstage. - */ -const struct soc_amd_stoneyridge_gpio gpio_set_stage_reset[] = { - /* NFC PU */ - {GPIO_64, Function0, FCH_GPIO_PULL_UP_ENABLE | OUTPUT_H }, - /* PCIe presence detect */ - {GPIO_69, Function0, FCH_GPIO_PULL_UP_ENABLE | INPUT }, - /* MUX for Power Express Eval */ - {GPIO_116, Function1, FCH_GPIO_PULL_DOWN_ENABLE | INPUT }, - /* SD power */ - {GPIO_119, Function2, FCH_GPIO_PULL_UP_ENABLE | OUTPUT_H }, -}; - -const struct soc_amd_stoneyridge_gpio gpio_set_stage_ram[] = { - /* BT radio disable */ - {GPIO_14, Function1, FCH_GPIO_PULL_UP_ENABLE | OUTPUT_H }, - /* NFC wake */ - {GPIO_65, Function0, FCH_GPIO_PULL_UP_ENABLE | OUTPUT_H }, - /* Webcam */ - {GPIO_66, Function0, FCH_GPIO_PULL_UP_ENABLE | OUTPUT_H }, - /* GPS sleep */ - {GPIO_70, Function0, FCH_GPIO_PULL_UP_ENABLE | OUTPUT_H }, -}; - -const struct soc_amd_stoneyridge_gpio *board_get_gpio(size_t *size) -{ - if (GPIO_TABLE_BOOTBLOCK) { - *size = ARRAY_SIZE(gpio_set_stage_reset); - return gpio_set_stage_reset; - } - *size = ARRAY_SIZE(gpio_set_stage_ram); - return gpio_set_stage_ram; -} |