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path: root/src/cpu/amd/model_lx/cache_as_ram.inc
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Diffstat (limited to 'src/cpu/amd/model_lx/cache_as_ram.inc')
-rw-r--r--src/cpu/amd/model_lx/cache_as_ram.inc14
1 files changed, 12 insertions, 2 deletions
diff --git a/src/cpu/amd/model_lx/cache_as_ram.inc b/src/cpu/amd/model_lx/cache_as_ram.inc
index 096a96155d..f776a7a727 100644
--- a/src/cpu/amd/model_lx/cache_as_ram.inc
+++ b/src/cpu/amd/model_lx/cache_as_ram.inc
@@ -34,6 +34,8 @@
/**
/***************************************************************************/
DCacheSetup:
+ /* Save the BIST result */
+ movl %eax, %ebx
invd
/* set cache properties */
@@ -173,9 +175,17 @@ DCacheSetupBad:
hlt /* issues */
jmp DCacheSetupBad
DCacheSetupGood:
-
/* Go do early init and memory setup */
- call cache_as_ram_main
+
+ /* Restore the BIST result */
+ movl %ebx, %eax
+ movl %esp, %ebp
+ pushl %eax
+
+ post_code(0x23)
+
+ /* Call romstage.c main function */
+ call main
done_cache_as_ram_main:
/* We now run over the stack-in-cache, copying it back to itself to invalidate the cache */