diff options
Diffstat (limited to 'Documentation/soc/intel/fsp/ppi')
| -rw-r--r-- | Documentation/soc/intel/fsp/ppi/mp_service_ppi.md | 2 | ||||
| -rw-r--r-- | Documentation/soc/intel/fsp/ppi/ppi.md | 12 |
2 files changed, 11 insertions, 3 deletions
diff --git a/Documentation/soc/intel/fsp/ppi/mp_service_ppi.md b/Documentation/soc/intel/fsp/ppi/mp_service_ppi.md index ab0b5135ed..ce2fb6bbb4 100644 --- a/Documentation/soc/intel/fsp/ppi/mp_service_ppi.md +++ b/Documentation/soc/intel/fsp/ppi/mp_service_ppi.md @@ -43,7 +43,7 @@ More details here: [PI_Spec_1_6] ### coreboot to publish EFI_MP_SERVICES_PPI APIs -```eval_rst +```{eval-rst} +------------------------------+------------------------------------------------------------------+ | API | Description | +==============================+==================================================================+ diff --git a/Documentation/soc/intel/fsp/ppi/ppi.md b/Documentation/soc/intel/fsp/ppi/ppi.md index 6d7afb47d4..bb14af04e6 100644 --- a/Documentation/soc/intel/fsp/ppi/ppi.md +++ b/Documentation/soc/intel/fsp/ppi/ppi.md @@ -6,9 +6,17 @@ chipset using Intel FSP. This feature is added into FSP specification 2.1 where FSP should be able to locate PPI, published by boot firmware and able to execute the same in FSP's context. -* [What is PPI](https://www.intel.com/content/dam/www/public/us/en/documents/reference-guides/efi-pei-cis-v09.pdf) +```{toctree} +:maxdepth: 1 + +What is PPI <https://www.intel.com/content/dam/www/public/us/en/documents/reference-guides/efi-pei-cis-v09.pdf> +``` ## List of PPI service ### Publish MP Service PPI from boot firmware (coreboot) to initialize CPU -- [MP Service PPI](mp_service_ppi.md) +```{toctree} +:maxdepth: 1 + +MP Service PPI <mp_service_ppi.md> +``` |