3 files changed, 46 insertions, 10 deletions
diff --git a/Documentation/soc/intel/fsp/index.md b/Documentation/soc/intel/fsp/index.md
index feeb5e9433..6d29aca63b 100644
--- a/Documentation/soc/intel/fsp/index.md
+++ b/Documentation/soc/intel/fsp/index.md
@@ -65,23 +65,51 @@ those are fixed. If possible a workaround is described here as well.
 
 ## Open Source Intel FSP specification
 
-* [About Intel FSP](https://firmware.intel.com/learn/fsp/about-intel-fsp)
+```{toctree}
+:maxdepth: 1
 
-* [FSP Specification 1.0](https://www.intel.in/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec.pdf)
+About Intel FSP <https://firmware.intel.com/learn/fsp/about-intel-fsp>
+```
 
-* [FSP Specification 1.1](https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v1-1.pdf)
+```{toctree}
+:maxdepth: 1
 
-* [FSP Specification 2.0](https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v2.pdf)
+FSP Specification 1.0 <https://www.intel.in/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec.pdf>
+```
 
-* [FSP Specification 2.1](https://cdrdv2.intel.com/v1/dl/getContent/611786)
+```{toctree}
+:maxdepth: 1
+
+FSP Specification 1.1 <https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v1-1.pdf>
+```
+
+```{toctree}
+:maxdepth: 1
+
+FSP Specification 2.0 <https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v2.pdf>
+```
+
+```{toctree}
+:maxdepth: 1
+
+FSP Specification 2.1 <https://cdrdv2.intel.com/v1/dl/getContent/611786>
+```
 
 ## Additional Features in FSP 2.1 specification
 
-- [PPI](ppi/ppi.md)
+```{toctree}
+:maxdepth: 1
+
+PPI <ppi/ppi.md>
+```
 
 ## Official bugtracker
 
-- [IntelFSP/FSP](https://github.com/IntelFsp/FSP/issues)
+```{toctree}
+:maxdepth: 1
+
+IntelFSP/FSP <https://github.com/IntelFsp/FSP/issues>
+```
 
 [Issue 10]: https://github.com/IntelFsp/FSP/issues/10
 [Issue 13]: https://github.com/IntelFsp/FSP/issues/13
diff --git a/Documentation/soc/intel/fsp/ppi/mp_service_ppi.md b/Documentation/soc/intel/fsp/ppi/mp_service_ppi.md
index ab0b5135ed..ce2fb6bbb4 100644
--- a/Documentation/soc/intel/fsp/ppi/mp_service_ppi.md
+++ b/Documentation/soc/intel/fsp/ppi/mp_service_ppi.md
@@ -43,7 +43,7 @@ More details here: [PI_Spec_1_6]
 
 ### coreboot to publish EFI_MP_SERVICES_PPI APIs
 
-```eval_rst
+```{eval-rst}
 +------------------------------+------------------------------------------------------------------+
 | API                          | Description                                                      |
 +==============================+==================================================================+
diff --git a/Documentation/soc/intel/fsp/ppi/ppi.md b/Documentation/soc/intel/fsp/ppi/ppi.md
index 6d7afb47d4..bb14af04e6 100644
--- a/Documentation/soc/intel/fsp/ppi/ppi.md
+++ b/Documentation/soc/intel/fsp/ppi/ppi.md
@@ -6,9 +6,17 @@ chipset using Intel FSP. This feature is added into FSP specification 2.1
 where FSP should be able to locate PPI, published by boot firmware and
 able to execute the same in FSP's context.
 
-* [What is PPI](https://www.intel.com/content/dam/www/public/us/en/documents/reference-guides/efi-pei-cis-v09.pdf)
+```{toctree}
+:maxdepth: 1
+
+What is PPI <https://www.intel.com/content/dam/www/public/us/en/documents/reference-guides/efi-pei-cis-v09.pdf>
+```
 
 ## List of PPI service
 
 ### Publish MP Service PPI from boot firmware (coreboot) to initialize CPU
-- [MP Service PPI](mp_service_ppi.md)
+```{toctree}
+:maxdepth: 1
+
+MP Service PPI <mp_service_ppi.md>
+```