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authorBrandon Breitenstein <brandon.breitenstein@intel.com>2016-06-24 10:41:39 -0700
committerMartin Roth <martinroth@google.com>2016-06-29 16:51:06 +0200
commitba3d626cfbc5b0ba4dcbdf756a3abf5e61afa210 (patch)
tree944ceb33a04f89b3f5e55ebc8aa63d730b859c45 /util/romcc/tests/simple_test54.c
parentdeed18627dd0ab7f31176ff2c148e62a481daf48 (diff)
soc/intel/apollolake: Update Upd header files for FSP Label 143_10
New UPDs added to header files as well as many comment fixes. Memory infor is now defined in FspmUpd.h and added ability to skip CSE RBP for coreboot. Removes some UPDs that are no longer available from source. BUG=chrome-os-partner:54677 BRANCH=none TEST=built and tested with FSP 143_10 version Change-Id: I7e1f531ebbe343b45151a265ac715ae74aeffcad Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Reviewed-on: https://review.coreboot.org/15459 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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