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authorMarshall Dawson <marshalldawson3rd@gmail.com>2020-11-19 14:02:29 -0700
committerMarshall Dawson <marshalldawson3rd@gmail.com>2020-12-11 19:36:23 +0000
commit13ec029145d60fcb6de460046f1edc162b5ca095 (patch)
tree46735c8a79a9de2ec0871f1b847915a0f258eeef /util/exynos
parent5446bdb270be409eaf5a0a60d86ebeb2ec4358ad (diff)
util/amdfwtool: Fix EFS generation polarity
The DWORD used to indicate the Embedded Firmware Structure's generation uses 1 to indicate a first-gen structure, e.g. a SPI device's erased value of 0xffffffff. A 0 in bit 0 is how Client PSPs will interpret the structure as designed for second-gen. This change and the original addition should have no effects on any current products as none interpret offset 0x24. BUG=b:158755102 TEST=inspect EFS in coreboot.rom Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: If391f356a1811ed04acdfe9ab9de2e146f6ef5fd Reviewed-on: https://review.coreboot.org/c/coreboot/+/47769 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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