diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2022-04-19 14:48:43 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-25 13:48:28 +0000 |
| commit | 685f123852a5eee9dc93d861645e87394bbc30df (patch) | |
| tree | 508c0dc0dd9505fabe4c16a7ce90422f2cd749f7 /util/crossgcc | |
| parent | 43f51a041d9f8ee5867031d043d541812b7fcab9 (diff) | |
soc/amd/sabrina: Modify start address of PSP verstage
PSP verstage can start at address 0 and use 200KB of PSP SRAM for
execution. Modify both the PSP SRAM start address and size for use by
PSP verstage.
BUG=b:220848544
TEST=Build Skyrim BIOS image with PSP verstage enabled.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I73e13b82faa0f443570a0c839e7699a79bdae024
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63732
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'util/crossgcc')
0 files changed, 0 insertions, 0 deletions