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authorAngel Pons <th3fanbus@gmail.com>2021-09-08 13:30:17 +0200
committerLean Sheng Tan <sheng.tan@9elements.com>2024-04-14 20:54:16 +0000
commitf58e53601669133b1f23eb2a580171075054418f (patch)
treeb54c13b170bc73bfc99dbd46724254bbe00c1de8 /util/bincfg/bincfg.lex.c_shipped
parent9cd1bf2c17932e5985c5156dfa5fea76c25da725 (diff)
lynxpoint/broadwell: Correct PCH-LP PCIe ASPM check
Lynx Point PCH reference code version 1.9.1 checks bit 29 to detect ASPM on PCH-LP root port #6, not bit 28. Document 535127 (BDW PCH-LP BS) also uses bit 29 for root port #6. Correct the bit used in the check, as well as the surrounding comments. Change-Id: Ie4bd7cbbfc151762f29eab1326567f987b25ab19 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57500 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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