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authorMatt DeVillier <matt.devillier@gmail.com>2022-02-10 17:01:35 -0600
committerFelix Held <felix-coreboot@felixheld.de>2022-02-15 18:10:59 +0000
commit575a2e589d50018946c6e7511cfc98610ea5bac8 (patch)
tree2feffce59cfc77f02633fa5280b863768944cb24 /tests/include/stubs
parent148b5456715cc8eebd25878c67ce906b6fc3adce (diff)
soc/intel/cnl: switch to PMC/IPC for HECI disable on SOC_INTEL_COMETLAKE
Commit d6dbd933 [soc/intel/cannonlake: Use SBI msg to disable HECI1] switched CNL-based mainboards from using FSP for HECI disablement to SBI msg, but this causes google/hatch to hang when attempting to unhide p2sb as part of disabling HECI1 via SBI during SMM, so switch to using PMC/IPC method. SOC_INTEL_WHISKEYLAKE and SOC_INTEL_COFFEELAKE do not support PMC disablement method, so they remain using SBI. Test: build/boot google/hatch, verify HECI1 disabled via console log and lspci in booted OS. Change-Id: I06f0eb312b579af4a0fe826403374dcd99689d21 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61882 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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