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-rw-r--r--src/soc/intel/cannonlake/Kconfig7
-rw-r--r--src/soc/intel/cannonlake/finalize.c4
-rw-r--r--src/soc/intel/cannonlake/smihandler.c2
3 files changed, 10 insertions, 3 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index f85cd156c3..94f0b4835d 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -5,15 +5,17 @@ config SOC_INTEL_COFFEELAKE
bool
select SOC_INTEL_CANNONLAKE_BASE
select FSP_USES_CB_STACK
+ select HAVE_EXP_X86_64_SUPPORT
select HAVE_INTEL_FSP_REPO
+ select HECI_DISABLE_USING_SMM if DISABLE_HECI1_AT_PRE_BOOT
select SOC_INTEL_CONFIGURE_DDI_A_4_LANES
- select HAVE_EXP_X86_64_SUPPORT
config SOC_INTEL_WHISKEYLAKE
bool
select SOC_INTEL_CANNONLAKE_BASE
select FSP_USES_CB_STACK
select HAVE_INTEL_FSP_REPO
+ select HECI_DISABLE_USING_SMM if DISABLE_HECI1_AT_PRE_BOOT
select SOC_INTEL_CONFIGURE_DDI_A_4_LANES
config SOC_INTEL_COMETLAKE
@@ -21,7 +23,9 @@ config SOC_INTEL_COMETLAKE
select SOC_INTEL_CANNONLAKE_BASE
select FSP_USES_CB_STACK
select HAVE_INTEL_FSP_REPO
+ select PMC_IPC_ACPI_INTERFACE if DISABLE_HECI1_AT_PRE_BOOT
select SOC_INTEL_CONFIGURE_DDI_A_4_LANES
+ select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC if DISABLE_HECI1_AT_PRE_BOOT
config SOC_INTEL_COMETLAKE_1
bool
@@ -109,7 +113,6 @@ config CPU_SPECIFIC_OPTIONS
config DISABLE_HECI1_AT_PRE_BOOT
default y if MAINBOARD_HAS_CHROMEOS
- select HECI_DISABLE_USING_SMM
config MAX_CPUS
int
diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c
index 63749f92cf..541037726e 100644
--- a/src/soc/intel/cannonlake/finalize.c
+++ b/src/soc/intel/cannonlake/finalize.c
@@ -7,6 +7,7 @@
#include <device/mmio.h>
#include <device/pci.h>
#include <intelblocks/cpulib.h>
+#include <intelblocks/cse.h>
#include <intelblocks/lpc_lib.h>
#include <intelblocks/pcr.h>
#include <intelblocks/pmclib.h>
@@ -95,6 +96,9 @@ static void soc_finalize(void *unused)
pch_finalize();
apm_control(APM_CNT_FINALIZE);
sa_finalize();
+ if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT) &&
+ CONFIG(SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC))
+ heci1_disable();
/* Indicate finalize step with post code */
post_code(POST_OS_BOOT);
diff --git a/src/soc/intel/cannonlake/smihandler.c b/src/soc/intel/cannonlake/smihandler.c
index 88b58e8607..ac25990821 100644
--- a/src/soc/intel/cannonlake/smihandler.c
+++ b/src/soc/intel/cannonlake/smihandler.c
@@ -16,7 +16,7 @@
*/
void smihandler_soc_at_finalize(void)
{
- if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT))
+ if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT) && CONFIG(HECI_DISABLE_USING_SMM))
heci1_disable();
}