diff options
author | Marc Jones <marc.jones@amd.com> | 2007-06-19 22:07:16 +0000 |
---|---|---|
committer | Uwe Hermann <uwe@hermann-uwe.de> | 2007-06-19 22:07:16 +0000 |
commit | c72ff11281233c097441e809a52b560b1a131196 (patch) | |
tree | 14dcb58ccb114ed7f6fcc1b0d61ed5e8c82a138d /src | |
parent | cbb8d8ad24cf356d67f8f3a29014342252b9a5b1 (diff) |
The GPIOs used for UART2 RX and TX were reversed.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2726 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r-- | src/southbridge/amd/cs5536/cs5536.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c index ef5064a8a8..9f4e90ed01 100644 --- a/src/southbridge/amd/cs5536/cs5536.c +++ b/src/southbridge/amd/cs5536/cs5536.c @@ -356,19 +356,19 @@ static void uarts_init(struct southbridge_amd_cs5536_config *sb) msr.lo |= sb->com2_irq << 28; wrmsr(MDD_IRQM_YHIGH, msr); - /* GPIO3 - UART2_RX */ - /* Set: Output Enable (0x4) */ - outl(GPIOL_3_SET, gpio_addr + GPIOL_OUTPUT_ENABLE); + /* GPIO4 - UART2_RX */ + /* Set: Output Enable (0x4) */ + outl(GPIOL_4_SET, gpio_addr + GPIOL_OUTPUT_ENABLE); /* Set: OUTAUX1 Select (0x10) */ - outl(GPIOL_3_SET, gpio_addr + GPIOL_OUT_AUX1_SELECT); + outl(GPIOL_4_SET, gpio_addr + GPIOL_OUT_AUX1_SELECT); - /* GPIO4 - UART2_TX */ - /* Set: Input Enable (0x20) */ - outl(GPIOL_4_SET, gpio_addr + GPIOL_INPUT_ENABLE); - /* Set: INAUX1 Select (0x34) */ - outl(GPIOL_4_SET, gpio_addr + GPIOL_IN_AUX1_SELECT); + /* GPIO3 - UART2_TX */ + /* Set: Input Enable (0x20) */ + outl(GPIOL_3_SET, gpio_addr + GPIOL_INPUT_ENABLE); + /* Set: INAUX1 Select (0x34) */ + outl(GPIOL_3_SET, gpio_addr + GPIOL_IN_AUX1_SELECT); - /* Set: GPIO 3 + 3 Pull Up (0x18) */ + /* Set: GPIO 3 and 4 Pull Up (0x18) */ outl(GPIOL_3_SET | GPIOL_4_SET, gpio_addr + GPIOL_PULLUP_ENABLE); |