diff options
author | Kangheui Won <khwon@chromium.org> | 2021-05-06 13:22:16 +1000 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2021-05-10 04:05:30 +0000 |
commit | a5dae4c4d6a7e206fe3f968088d623b2ec776db4 (patch) | |
tree | bb24aeabc1c5bf549b08345faf46abc5a392e9e8 /src | |
parent | 411e2370817aea0043faafca0d5db4db978f6253 (diff) |
psp_verstage: move platform-specific code to chipset.c
Move all platform-specific code except direct svc calls to chipset.c.
There will be differences between each platforms and we can't put
everything into svc.c.
TEST=build firmware for zork
Signed-off-by: Kangheui Won <khwon@chromium.org>
Change-Id: Ie7a71d1632800072a17c26591e13e09e0269cf75
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52963
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/amd/cezanne/psp_verstage/Makefile.inc | 2 | ||||
-rw-r--r-- | src/soc/amd/cezanne/psp_verstage/chipset.c (renamed from src/soc/amd/cezanne/psp_verstage/stub.c) | 15 | ||||
-rw-r--r-- | src/soc/amd/cezanne/psp_verstage/svc.c | 10 | ||||
-rw-r--r-- | src/soc/amd/picasso/psp_verstage/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/amd/picasso/psp_verstage/chipset.c | 20 | ||||
-rw-r--r-- | src/soc/amd/picasso/psp_verstage/svc.c | 16 |
6 files changed, 37 insertions, 27 deletions
diff --git a/src/soc/amd/cezanne/psp_verstage/Makefile.inc b/src/soc/amd/cezanne/psp_verstage/Makefile.inc index 3f924330b9..ea9353d444 100644 --- a/src/soc/amd/cezanne/psp_verstage/Makefile.inc +++ b/src/soc/amd/cezanne/psp_verstage/Makefile.inc @@ -8,7 +8,7 @@ verstage-generic-ccopts += -I$(src)/soc/amd/common/psp_verstage/include subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../../common/psp_verstage verstage-y += svc.c -verstage-y += stub.c +verstage-y += chipset.c verstage-y += $(top)/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_startup.S verstage-y += $(top)/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S diff --git a/src/soc/amd/cezanne/psp_verstage/stub.c b/src/soc/amd/cezanne/psp_verstage/chipset.c index b3ec7044b4..7f944ebcbc 100644 --- a/src/soc/amd/cezanne/psp_verstage/stub.c +++ b/src/soc/amd/cezanne/psp_verstage/chipset.c @@ -11,6 +11,21 @@ #include <reset.h> #include <timer.h> +uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) +{ + return svc_update_psp_bios_dir(psp_dir_offset, bios_dir_offset); +} + +uint32_t save_uapp_data(void *address, uint32_t size) +{ + return svc_save_uapp_data(address, size); +} + + +/* Functions below are stub functions for not-yet-implemented PSP features. + * These functions should be replaced with proper implementations later. + */ + uint32_t svc_write_postcode(uint32_t postcode) { return 0; diff --git a/src/soc/amd/cezanne/psp_verstage/svc.c b/src/soc/amd/cezanne/psp_verstage/svc.c index 3d10c22663..70cb36983c 100644 --- a/src/soc/amd/cezanne/psp_verstage/svc.c +++ b/src/soc/amd/cezanne/psp_verstage/svc.c @@ -82,11 +82,6 @@ uint32_t svc_unmap_spi_rom(void *spi_rom_addr) return retval; } -uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) -{ - return svc_update_psp_bios_dir(psp_dir_offset, bios_dir_offset); -} - uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) { @@ -96,11 +91,6 @@ uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, return retval; } -uint32_t save_uapp_data(void *address, uint32_t size) -{ - return svc_save_uapp_data(address, size); -} - uint32_t svc_save_uapp_data(void *address, uint32_t size) { uint32_t retval = 0; diff --git a/src/soc/amd/picasso/psp_verstage/Makefile.inc b/src/soc/amd/picasso/psp_verstage/Makefile.inc index 32b594d2cb..41296c9b0c 100644 --- a/src/soc/amd/picasso/psp_verstage/Makefile.inc +++ b/src/soc/amd/picasso/psp_verstage/Makefile.inc @@ -4,6 +4,7 @@ verstage-generic-ccopts += -I$(src)/soc/amd/picasso/psp_verstage/include verstage-generic-ccopts += -I$(src)/vendorcode/amd/fsp/picasso/include verstage-y += svc.c +verstage-y += chipset.c verstage-y += $(top)/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S verstage-y += $(top)/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S diff --git a/src/soc/amd/picasso/psp_verstage/chipset.c b/src/soc/amd/picasso/psp_verstage/chipset.c new file mode 100644 index 0000000000..57a2ff39a2 --- /dev/null +++ b/src/soc/amd/picasso/psp_verstage/chipset.c @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <bl_uapp/bl_syscall_public.h> +#include <psp_verstage.h> + +uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) +{ + return svc_update_psp_bios_dir(psp_dir_offset, bios_dir_offset, + DIR_OFFSET_SET); +} + +uint32_t save_uapp_data(void *address, uint32_t size) +{ + return svc_save_uapp_data(UAPP_COPYBUF_CHROME_WORKBUF, address, size); +} + +uint32_t get_max_workbuf_size(uint32_t *size) +{ + return svc_get_max_workbuf_size(size); +} diff --git a/src/soc/amd/picasso/psp_verstage/svc.c b/src/soc/amd/picasso/psp_verstage/svc.c index 28e6bafa95..d94ec769da 100644 --- a/src/soc/amd/picasso/psp_verstage/svc.c +++ b/src/soc/amd/picasso/psp_verstage/svc.c @@ -96,12 +96,6 @@ uint32_t svc_unmap_spi_rom(void *spi_rom_addr) return retval; } -uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) -{ - return svc_update_psp_bios_dir(psp_dir_offset, bios_dir_offset, - DIR_OFFSET_SET); -} - uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset, enum dir_offset_operation operation) { @@ -112,11 +106,6 @@ uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, return retval; } -uint32_t save_uapp_data(void *address, uint32_t size) -{ - return svc_save_uapp_data(UAPP_COPYBUF_CHROME_WORKBUF, address, size); -} - uint32_t svc_save_uapp_data(enum uapp_copybuf type, void *address, uint32_t size) { @@ -149,11 +138,6 @@ uint32_t svc_write_postcode(uint32_t postcode) return retval; } -uint32_t get_max_workbuf_size(uint32_t *size) -{ - return svc_get_max_workbuf_size(size); -} - uint32_t svc_get_max_workbuf_size(uint32_t *size) { uint32_t retval = 0; |