From a5dae4c4d6a7e206fe3f968088d623b2ec776db4 Mon Sep 17 00:00:00 2001 From: Kangheui Won Date: Thu, 6 May 2021 13:22:16 +1000 Subject: psp_verstage: move platform-specific code to chipset.c Move all platform-specific code except direct svc calls to chipset.c. There will be differences between each platforms and we can't put everything into svc.c. TEST=build firmware for zork Signed-off-by: Kangheui Won Change-Id: Ie7a71d1632800072a17c26591e13e09e0269cf75 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52963 Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- src/soc/amd/cezanne/psp_verstage/Makefile.inc | 2 +- src/soc/amd/cezanne/psp_verstage/chipset.c | 46 +++++++++++++++++++++++++++ src/soc/amd/cezanne/psp_verstage/stub.c | 31 ------------------ src/soc/amd/cezanne/psp_verstage/svc.c | 10 ------ src/soc/amd/picasso/psp_verstage/Makefile.inc | 1 + src/soc/amd/picasso/psp_verstage/chipset.c | 20 ++++++++++++ src/soc/amd/picasso/psp_verstage/svc.c | 16 ---------- 7 files changed, 68 insertions(+), 58 deletions(-) create mode 100644 src/soc/amd/cezanne/psp_verstage/chipset.c delete mode 100644 src/soc/amd/cezanne/psp_verstage/stub.c create mode 100644 src/soc/amd/picasso/psp_verstage/chipset.c (limited to 'src') diff --git a/src/soc/amd/cezanne/psp_verstage/Makefile.inc b/src/soc/amd/cezanne/psp_verstage/Makefile.inc index 3f924330b9..ea9353d444 100644 --- a/src/soc/amd/cezanne/psp_verstage/Makefile.inc +++ b/src/soc/amd/cezanne/psp_verstage/Makefile.inc @@ -8,7 +8,7 @@ verstage-generic-ccopts += -I$(src)/soc/amd/common/psp_verstage/include subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../../common/psp_verstage verstage-y += svc.c -verstage-y += stub.c +verstage-y += chipset.c verstage-y += $(top)/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_startup.S verstage-y += $(top)/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S diff --git a/src/soc/amd/cezanne/psp_verstage/chipset.c b/src/soc/amd/cezanne/psp_verstage/chipset.c new file mode 100644 index 0000000000..7f944ebcbc --- /dev/null +++ b/src/soc/amd/cezanne/psp_verstage/chipset.c @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* This file contains stub for not-yet-implemented svc in cezanne PSP. + * So this file will and should be removed eventually when psp_verstage works + * correctly in cezanne. + */ + +#include +#include +#include +#include +#include + +uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) +{ + return svc_update_psp_bios_dir(psp_dir_offset, bios_dir_offset); +} + +uint32_t save_uapp_data(void *address, uint32_t size) +{ + return svc_save_uapp_data(address, size); +} + + +/* Functions below are stub functions for not-yet-implemented PSP features. + * These functions should be replaced with proper implementations later. + */ + +uint32_t svc_write_postcode(uint32_t postcode) +{ + return 0; +} + +static uint64_t tmp_timer_value = 0; +void timer_monotonic_get(struct mono_time *mt) +{ + mt->microseconds = tmp_timer_value / 1000; + tmp_timer_value++; +} + +void do_board_reset(void) +{ + printk(BIOS_ERR, "Reset not implemented yet.\n"); + while (1) + ; +} diff --git a/src/soc/amd/cezanne/psp_verstage/stub.c b/src/soc/amd/cezanne/psp_verstage/stub.c deleted file mode 100644 index b3ec7044b4..0000000000 --- a/src/soc/amd/cezanne/psp_verstage/stub.c +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/* This file contains stub for not-yet-implemented svc in cezanne PSP. - * So this file will and should be removed eventually when psp_verstage works - * correctly in cezanne. - */ - -#include -#include -#include -#include -#include - -uint32_t svc_write_postcode(uint32_t postcode) -{ - return 0; -} - -static uint64_t tmp_timer_value = 0; -void timer_monotonic_get(struct mono_time *mt) -{ - mt->microseconds = tmp_timer_value / 1000; - tmp_timer_value++; -} - -void do_board_reset(void) -{ - printk(BIOS_ERR, "Reset not implemented yet.\n"); - while (1) - ; -} diff --git a/src/soc/amd/cezanne/psp_verstage/svc.c b/src/soc/amd/cezanne/psp_verstage/svc.c index 3d10c22663..70cb36983c 100644 --- a/src/soc/amd/cezanne/psp_verstage/svc.c +++ b/src/soc/amd/cezanne/psp_verstage/svc.c @@ -82,11 +82,6 @@ uint32_t svc_unmap_spi_rom(void *spi_rom_addr) return retval; } -uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) -{ - return svc_update_psp_bios_dir(psp_dir_offset, bios_dir_offset); -} - uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) { @@ -96,11 +91,6 @@ uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, return retval; } -uint32_t save_uapp_data(void *address, uint32_t size) -{ - return svc_save_uapp_data(address, size); -} - uint32_t svc_save_uapp_data(void *address, uint32_t size) { uint32_t retval = 0; diff --git a/src/soc/amd/picasso/psp_verstage/Makefile.inc b/src/soc/amd/picasso/psp_verstage/Makefile.inc index 32b594d2cb..41296c9b0c 100644 --- a/src/soc/amd/picasso/psp_verstage/Makefile.inc +++ b/src/soc/amd/picasso/psp_verstage/Makefile.inc @@ -4,6 +4,7 @@ verstage-generic-ccopts += -I$(src)/soc/amd/picasso/psp_verstage/include verstage-generic-ccopts += -I$(src)/vendorcode/amd/fsp/picasso/include verstage-y += svc.c +verstage-y += chipset.c verstage-y += $(top)/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S verstage-y += $(top)/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S diff --git a/src/soc/amd/picasso/psp_verstage/chipset.c b/src/soc/amd/picasso/psp_verstage/chipset.c new file mode 100644 index 0000000000..57a2ff39a2 --- /dev/null +++ b/src/soc/amd/picasso/psp_verstage/chipset.c @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include + +uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) +{ + return svc_update_psp_bios_dir(psp_dir_offset, bios_dir_offset, + DIR_OFFSET_SET); +} + +uint32_t save_uapp_data(void *address, uint32_t size) +{ + return svc_save_uapp_data(UAPP_COPYBUF_CHROME_WORKBUF, address, size); +} + +uint32_t get_max_workbuf_size(uint32_t *size) +{ + return svc_get_max_workbuf_size(size); +} diff --git a/src/soc/amd/picasso/psp_verstage/svc.c b/src/soc/amd/picasso/psp_verstage/svc.c index 28e6bafa95..d94ec769da 100644 --- a/src/soc/amd/picasso/psp_verstage/svc.c +++ b/src/soc/amd/picasso/psp_verstage/svc.c @@ -96,12 +96,6 @@ uint32_t svc_unmap_spi_rom(void *spi_rom_addr) return retval; } -uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) -{ - return svc_update_psp_bios_dir(psp_dir_offset, bios_dir_offset, - DIR_OFFSET_SET); -} - uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset, enum dir_offset_operation operation) { @@ -112,11 +106,6 @@ uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, return retval; } -uint32_t save_uapp_data(void *address, uint32_t size) -{ - return svc_save_uapp_data(UAPP_COPYBUF_CHROME_WORKBUF, address, size); -} - uint32_t svc_save_uapp_data(enum uapp_copybuf type, void *address, uint32_t size) { @@ -149,11 +138,6 @@ uint32_t svc_write_postcode(uint32_t postcode) return retval; } -uint32_t get_max_workbuf_size(uint32_t *size) -{ - return svc_get_max_workbuf_size(size); -} - uint32_t svc_get_max_workbuf_size(uint32_t *size) { uint32_t retval = 0; -- cgit v1.2.3