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authorKevin Chiu <kevin.chiu.17802@gmail.com>2021-01-22 14:52:53 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-01-25 08:51:26 +0000
commit845b65bf5e8d04e5bbc11d49b07e8b49e36bb023 (patch)
treee383cb035e9a0d9e095ad1d372490cd3fca53357 /src
parent5a27b756423b5913c32ffbfccc9014c60b20e910 (diff)
mb/google/zork: update USB 2.0 controller Lane Parameter for gumboz
From AMD USB phy specialist recommended that for DB port2 (type-A), port3 (type-C C1) the most effective corrections for the depressed eye are tx_rise_tune=0x0 tx_pre_emp_amp_tune=0x3 tx_fsls_tune = 0x3 BUG=b:173476380 BRANCH=zork TEST=1. emerge-zork coreboot 2. pass USB 2.0 SI eye diagram verification Change-Id: Ib31c5d55e30b958d3e552e8d0b4a160947444636 Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49826 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/zork/variants/gumboz/overridetree.cb39
1 files changed, 39 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/gumboz/overridetree.cb b/src/mainboard/google/zork/variants/gumboz/overridetree.cb
index a9dbc10495..73a4a282ff 100644
--- a/src/mainboard/google/zork/variants/gumboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/gumboz/overridetree.cb
@@ -21,6 +21,45 @@ chip soc/amd/picasso
register "telemetry_vddcr_soc_offset" = "167"
# End : OPN Performance Configuration
+ # USB 2.0 strength - MB type-C C0
+ register "usb_2_port_tune_params[0]" = "{
+ .com_pds_tune = 0x07,
+ .sq_rx_tune = 0x3,
+ .tx_fsls_tune = 0x3,
+ .tx_pre_emp_amp_tune = 0x03,
+ .tx_pre_emp_pulse_tune = 0x0,
+ .tx_rise_tune = 0x1,
+ .tx_vref_tune = 0xe,
+ .tx_hsxv_tune = 0x3,
+ .tx_res_tune = 0x01,
+ }"
+
+ # USB 2.0 strength - DB type-A
+ register "usb_2_port_tune_params[2]" = "{
+ .com_pds_tune = 0x07,
+ .sq_rx_tune = 0x3,
+ .tx_fsls_tune = 0x3,
+ .tx_pre_emp_amp_tune = 0x03,
+ .tx_pre_emp_pulse_tune = 0x0,
+ .tx_rise_tune = 0x0,
+ .tx_vref_tune = 0xe,
+ .tx_hsxv_tune = 0x3,
+ .tx_res_tune = 0x01,
+ }"
+
+ # USB 2.0 strength - DB type-C C1
+ register "usb_2_port_tune_params[3]" = "{
+ .com_pds_tune = 0x07,
+ .sq_rx_tune = 0x3,
+ .tx_fsls_tune = 0x3,
+ .tx_pre_emp_amp_tune = 0x03,
+ .tx_pre_emp_pulse_tune = 0x0,
+ .tx_rise_tune = 0x0,
+ .tx_vref_tune = 0xe,
+ .tx_hsxv_tune = 0x3,
+ .tx_res_tune = 0x01,
+ }"
+
# I2C2 for touchscreen and trackpad
register "i2c[2]" = "{
.speed = I2C_SPEED_FAST,