diff options
author | Ben Gardner <gardner.ben@gmail.com> | 2016-04-13 17:06:18 -0500 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-04-15 16:26:11 +0200 |
commit | 17573035fd6832499a63523d4cd4f70a817a1460 (patch) | |
tree | 7fae8a5ab5ae0fae43d8bfad3cdc79ecf99c6cf9 /src | |
parent | 785a31d67e8f34065a2483080e4fd7032c3a8aad (diff) |
intel/fsp_baytrail: fix whitespace issue in romstage.c
Change-Id: Ibb36292bb2fd40aa453dba1d9ce821f3e1e7a823
Reviewed-on: https://review.coreboot.org/14354
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/intel/fsp_baytrail/romstage/romstage.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c index b485be1e83..385b3e4555 100644 --- a/src/soc/intel/fsp_baytrail/romstage/romstage.c +++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c @@ -214,7 +214,8 @@ void main(FSP_INFO_HEADER *fsp_info_header) * The FSP early_init function returns to this function. * Memory is setup and the stack is set by the FSP. */ -void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) { +void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) +{ int cbmem_was_initted; void *cbmem_hob_ptr; uint32_t prev_sleep_state; |