From 17573035fd6832499a63523d4cd4f70a817a1460 Mon Sep 17 00:00:00 2001 From: Ben Gardner Date: Wed, 13 Apr 2016 17:06:18 -0500 Subject: intel/fsp_baytrail: fix whitespace issue in romstage.c Change-Id: Ibb36292bb2fd40aa453dba1d9ce821f3e1e7a823 Reviewed-on: https://review.coreboot.org/14354 Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- src/soc/intel/fsp_baytrail/romstage/romstage.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c index b485be1e83..385b3e4555 100644 --- a/src/soc/intel/fsp_baytrail/romstage/romstage.c +++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c @@ -214,7 +214,8 @@ void main(FSP_INFO_HEADER *fsp_info_header) * The FSP early_init function returns to this function. * Memory is setup and the stack is set by the FSP. */ -void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) { +void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) +{ int cbmem_was_initted; void *cbmem_hob_ptr; uint32_t prev_sleep_state; -- cgit v1.2.3