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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-02 16:41:43 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-26 10:05:48 +0000 |
commit | 63fac81fc80d701a785ed61a3b5738ea0a821169 (patch) | |
tree | 7b50798c95fc1e3ec309351157197784e04131f8 /src/vendorcode/amd/agesa/f16kb | |
parent | 8bf978c2aa92aa194d74e6588344f579de5828de (diff) |
AGESA: Implement POSTCAR_STAGE
Move all boards that have moved away from AGESA_LEGACY_WRAPPER
or BINARYPI_LEGACY_WRAPPER to use POSTCAR_STAGE.
We use POSTCAR_STAGE as a conditional in CAR teardown to tell
our MTRR setup is prepared such that invalidation without
writeback is a valid operation.
Change-Id: I3f4e2170054bdb84c72d2f7c956f8d51a6d7f0ca
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21384
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vendorcode/amd/agesa/f16kb')
-rw-r--r-- | src/vendorcode/amd/agesa/f16kb/gcccar.inc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/gcccar.inc b/src/vendorcode/amd/agesa/f16kb/gcccar.inc index 26e61da34b..8ad4d1ddc4 100644 --- a/src/vendorcode/amd/agesa/f16kb/gcccar.inc +++ b/src/vendorcode/amd/agesa/f16kb/gcccar.inc @@ -615,7 +615,11 @@ fam16_disable_stack_remote_read_exit: # This shouldn't be used with S3 resume IF the stack/cache area is # not reserved and over system memory. #-------------------------------------------------------------------------- +#if !IS_ENABLED(CONFIG_POSTCAR_STAGE) wbinvd +#else + invd +#endif #Do Standard Family 16 work mov $HWCR, %ecx # MSR:C001_0015h |