From 63fac81fc80d701a785ed61a3b5738ea0a821169 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 2 Sep 2017 16:41:43 +0300 Subject: AGESA: Implement POSTCAR_STAGE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move all boards that have moved away from AGESA_LEGACY_WRAPPER or BINARYPI_LEGACY_WRAPPER to use POSTCAR_STAGE. We use POSTCAR_STAGE as a conditional in CAR teardown to tell our MTRR setup is prepared such that invalidation without writeback is a valid operation. Change-Id: I3f4e2170054bdb84c72d2f7c956f8d51a6d7f0ca Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/21384 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/vendorcode/amd/agesa/f16kb/gcccar.inc | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/vendorcode/amd/agesa/f16kb') diff --git a/src/vendorcode/amd/agesa/f16kb/gcccar.inc b/src/vendorcode/amd/agesa/f16kb/gcccar.inc index 26e61da34b..8ad4d1ddc4 100644 --- a/src/vendorcode/amd/agesa/f16kb/gcccar.inc +++ b/src/vendorcode/amd/agesa/f16kb/gcccar.inc @@ -615,7 +615,11 @@ fam16_disable_stack_remote_read_exit: # This shouldn't be used with S3 resume IF the stack/cache area is # not reserved and over system memory. #-------------------------------------------------------------------------- +#if !IS_ENABLED(CONFIG_POSTCAR_STAGE) wbinvd +#else + invd +#endif #Do Standard Family 16 work mov $HWCR, %ecx # MSR:C001_0015h -- cgit v1.2.3