diff options
| author | Stefan Reinauer <reinauer@chromium.org> | 2015-07-30 11:17:40 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-10-30 18:24:07 +0100 |
| commit | d91ddc8d3181b8ab23726c8e744093f39473c202 (patch) | |
| tree | 9214b34758be7bb547f7168fc838abeb00e05c7d /src/vendorcode/amd/agesa/f10/gcccar.inc | |
| parent | 772029fe7321e0ddea11711b6756a32f19572db4 (diff) | |
vendorcode/amd: 64bit fixes
Change-Id: I6a0752cf0c0e484e670acca97c4991b5578845fb
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/11081
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f10/gcccar.inc')
| -rw-r--r-- | src/vendorcode/amd/agesa/f10/gcccar.inc | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/vendorcode/amd/agesa/f10/gcccar.inc b/src/vendorcode/amd/agesa/f10/gcccar.inc index 94d0ccc3fa..2f0e0836b0 100644 --- a/src/vendorcode/amd/agesa/f10/gcccar.inc +++ b/src/vendorcode/amd/agesa/f10/gcccar.inc @@ -240,7 +240,7 @@ MSR_MASK = ((1 << MTRR_DEF_TYPE_EN)+(1 << MTRR_DEF_TYPE_FIX_EN)) jnz node_core_exit # Br if yes mov $((1 << FLAG_UNKNOWN_FAMILY)+(1 << FLAG_IS_PRIMARY)), %esi # No, Set error code, Only let BSP continue - + mov $APIC_BASE_ADDRESS, %ecx # MSR:0000_001B _RDMSR bt $APIC_BSC, %eax # Is this the BSC? @@ -965,7 +965,7 @@ fam15_enable_stack_hook_exit: btr $DIS_HW_PF, %eax # Turn on hardware prefetches #.endif # End workaround for erratum 498 0: - _WRMSR + _WRMSR #-------------------------------------------------------------------------- # Begin critical sequence in which EAX, BX, ECX, and EDX must be preserved. #-------------------------------------------------------------------------- @@ -1609,4 +1609,3 @@ ClearTheStack: # Stack base is in SS, stack pointer is xor %eax, %eax .endm - |