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authorElyes Haouas <ehaouas@noos.fr>2023-01-31 07:39:43 +0100
committerElyes Haouas <ehaouas@noos.fr>2023-02-01 03:03:34 +0000
commit7cba1c486beb9287dc563784904d2a8e0235340a (patch)
tree89b09e2fefe971a877a9a01e83fc4959c4acdab5 /src/southbridge
parentddcb7f1cc410577726f1c34842cf3065ac985ec0 (diff)
treewide: Remove duplicated include <device/pci.h>
<device/pci.h> chain-includes <device/pci_def.h> & <device/pci_type.h>. Change-Id: I4e5999443e81ee1c4b1fd69942050b47f21f42f8 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72626 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/pi/hudson/hudson.c1
-rw-r--r--src/southbridge/amd/pi/hudson/lpc.c1
-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c1
-rw-r--r--src/southbridge/intel/bd82x6x/me.c1
-rw-r--r--src/southbridge/intel/bd82x6x/me_8.x.c1
-rw-r--r--src/southbridge/intel/bd82x6x/me_common.c1
-rw-r--r--src/southbridge/intel/bd82x6x/me_smm.c1
-rw-r--r--src/southbridge/intel/bd82x6x/pch.c1
-rw-r--r--src/southbridge/intel/bd82x6x/pci.c1
-rw-r--r--src/southbridge/intel/bd82x6x/pcie.c1
-rw-r--r--src/southbridge/intel/bd82x6x/smbus.c1
-rw-r--r--src/southbridge/intel/common/pciehp.c1
-rw-r--r--src/southbridge/intel/common/smbus_ops.c1
-rw-r--r--src/southbridge/intel/common/watchdog.c1
-rw-r--r--src/southbridge/intel/i82371eb/early_pm.c1
-rw-r--r--src/southbridge/intel/i82371eb/early_smbus.c1
-rw-r--r--src/southbridge/intel/i82801gx/ac97.c1
-rw-r--r--src/southbridge/intel/i82801gx/pci.c1
-rw-r--r--src/southbridge/intel/i82801gx/pcie.c1
-rw-r--r--src/southbridge/intel/i82801gx/smbus.c1
-rw-r--r--src/southbridge/intel/i82801gx/usb_ehci.c1
-rw-r--r--src/southbridge/intel/i82801ix/pcie.c1
-rw-r--r--src/southbridge/intel/i82801ix/smbus.c1
-rw-r--r--src/southbridge/intel/i82801jx/pcie.c1
-rw-r--r--src/southbridge/intel/i82801jx/smbus.c1
-rw-r--r--src/southbridge/intel/ibexpeak/me.c1
-rw-r--r--src/southbridge/intel/ibexpeak/pch.c1
-rw-r--r--src/southbridge/intel/ibexpeak/smbus.c1
-rw-r--r--src/southbridge/intel/ibexpeak/thermal.c1
-rw-r--r--src/southbridge/intel/lynxpoint/me.c1
-rw-r--r--src/southbridge/intel/lynxpoint/pch.c1
-rw-r--r--src/southbridge/intel/lynxpoint/pcie.c1
-rw-r--r--src/southbridge/intel/lynxpoint/pmutil.c1
33 files changed, 0 insertions, 33 deletions
diff --git a/src/southbridge/amd/pi/hudson/hudson.c b/src/southbridge/amd/pi/hudson/hudson.c
index 1e9864a2ee..59e293f70f 100644
--- a/src/southbridge/amd/pi/hudson/hudson.c
+++ b/src/southbridge/amd/pi/hudson/hudson.c
@@ -7,7 +7,6 @@
#include <acpi/acpi.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <types.h>
diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c
index ccca1138e7..7abb5bf379 100644
--- a/src/southbridge/amd/pi/hudson/lpc.c
+++ b/src/southbridge/amd/pi/hudson/lpc.c
@@ -7,7 +7,6 @@
#include <device/pnp.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <device/pci_def.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
#include <arch/io.h>
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 7c10c817ea..0cf7b9c433 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -5,7 +5,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <device/pci_def.h>
#include <option.h>
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index 66c7dd2997..73948824f1 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -16,7 +16,6 @@
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_ids.h>
-#include <device/pci_def.h>
#include <elog.h>
#include <halt.h>
#include <option.h>
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index 2a6caa67db..8702c4da23 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -16,7 +16,6 @@
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_ids.h>
-#include <device/pci_def.h>
#include <string.h>
#include <elog.h>
#include <halt.h>
diff --git a/src/southbridge/intel/bd82x6x/me_common.c b/src/southbridge/intel/bd82x6x/me_common.c
index a48d412880..2db3c2d119 100644
--- a/src/southbridge/intel/bd82x6x/me_common.c
+++ b/src/southbridge/intel/bd82x6x/me_common.c
@@ -6,7 +6,6 @@
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_ids.h>
-#include <device/pci_def.h>
#include <string.h>
#include <delay.h>
#include <halt.h>
diff --git a/src/southbridge/intel/bd82x6x/me_smm.c b/src/southbridge/intel/bd82x6x/me_smm.c
index c7a7f45ad7..ea39559d98 100644
--- a/src/southbridge/intel/bd82x6x/me_smm.c
+++ b/src/southbridge/intel/bd82x6x/me_smm.c
@@ -2,7 +2,6 @@
#include <console/console.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <stdint.h>
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c
index 16ffaf5240..ae8ed9b15c 100644
--- a/src/southbridge/intel/bd82x6x/pch.c
+++ b/src/southbridge/intel/bd82x6x/pch.c
@@ -4,7 +4,6 @@
#include <delay.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <string.h>
diff --git a/src/southbridge/intel/bd82x6x/pci.c b/src/southbridge/intel/bd82x6x/pci.c
index b82f3dac47..382506b97a 100644
--- a/src/southbridge/intel/bd82x6x/pci.c
+++ b/src/southbridge/intel/bd82x6x/pci.c
@@ -3,7 +3,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "pch.h"
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index a85b2619ad..6f082e8107 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -3,7 +3,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <device/pciexp.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c
index 3c190757d6..0cb6d0029e 100644
--- a/src/southbridge/intel/bd82x6x/smbus.c
+++ b/src/southbridge/intel/bd82x6x/smbus.c
@@ -4,7 +4,6 @@
#include <device/path.h>
#include <device/smbus.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus_host.h>
diff --git a/src/southbridge/intel/common/pciehp.c b/src/southbridge/intel/common/pciehp.c
index 82b61227f2..db356b0cdb 100644
--- a/src/southbridge/intel/common/pciehp.c
+++ b/src/southbridge/intel/common/pciehp.c
@@ -4,7 +4,6 @@
#include <acpi/acpigen.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include "pciehp.h"
diff --git a/src/southbridge/intel/common/smbus_ops.c b/src/southbridge/intel/common/smbus_ops.c
index 46fc58ab0a..347de736e9 100644
--- a/src/southbridge/intel/common/smbus_ops.c
+++ b/src/southbridge/intel/common/smbus_ops.c
@@ -4,7 +4,6 @@
#include <device/path.h>
#include <device/smbus.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/smbus_host.h>
#include <southbridge/intel/common/smbus_ops.h>
diff --git a/src/southbridge/intel/common/watchdog.c b/src/southbridge/intel/common/watchdog.c
index e22dbfbf62..1c43a0cd9b 100644
--- a/src/southbridge/intel/common/watchdog.c
+++ b/src/southbridge/intel/common/watchdog.c
@@ -3,7 +3,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <southbridge/intel/common/pmbase.h>
#include <southbridge/intel/common/tco.h>
diff --git a/src/southbridge/intel/i82371eb/early_pm.c b/src/southbridge/intel/i82371eb/early_pm.c
index 2a1c6ebae9..3cf56f258e 100644
--- a/src/southbridge/intel/i82371eb/early_pm.c
+++ b/src/southbridge/intel/i82371eb/early_pm.c
@@ -3,7 +3,6 @@
#include <stdint.h>
#include <device/pci_ops.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ids.h>
#include "i82371eb.h"
diff --git a/src/southbridge/intel/i82371eb/early_smbus.c b/src/southbridge/intel/i82371eb/early_smbus.c
index d2ff00a1eb..0e0fd5bb77 100644
--- a/src/southbridge/intel/i82371eb/early_smbus.c
+++ b/src/southbridge/intel/i82371eb/early_smbus.c
@@ -4,7 +4,6 @@
#include <device/pci_ops.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <device/pci_def.h>
#include <device/smbus_host.h>
#include "i82371eb.h"
diff --git a/src/southbridge/intel/i82801gx/ac97.c b/src/southbridge/intel/i82801gx/ac97.c
index bdc8f779f6..aa73ae21d4 100644
--- a/src/southbridge/intel/i82801gx/ac97.c
+++ b/src/southbridge/intel/i82801gx/ac97.c
@@ -4,7 +4,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pci_ops.h>
#include <delay.h>
diff --git a/src/southbridge/intel/i82801gx/pci.c b/src/southbridge/intel/i82801gx/pci.c
index bf123bd316..a9e86a0df7 100644
--- a/src/southbridge/intel/i82801gx/pci.c
+++ b/src/southbridge/intel/i82801gx/pci.c
@@ -2,7 +2,6 @@
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "i82801gx.h"
diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c
index b9b8ccdf66..befbf3beb7 100644
--- a/src/southbridge/intel/i82801gx/pcie.c
+++ b/src/southbridge/intel/i82801gx/pcie.c
@@ -3,7 +3,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "chip.h"
diff --git a/src/southbridge/intel/i82801gx/smbus.c b/src/southbridge/intel/i82801gx/smbus.c
index cfacca0b5f..d4980373d6 100644
--- a/src/southbridge/intel/i82801gx/smbus.c
+++ b/src/southbridge/intel/i82801gx/smbus.c
@@ -4,7 +4,6 @@
#include <device/path.h>
#include <device/smbus.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/smbus_host.h>
#include <southbridge/intel/common/smbus_ops.h>
diff --git a/src/southbridge/intel/i82801gx/usb_ehci.c b/src/southbridge/intel/i82801gx/usb_ehci.c
index 811dc503b7..bfaceea1ed 100644
--- a/src/southbridge/intel/i82801gx/usb_ehci.c
+++ b/src/southbridge/intel/i82801gx/usb_ehci.c
@@ -7,7 +7,6 @@
#include "i82801gx.h"
#include <device/pci_ehci.h>
#include <device/mmio.h>
-#include <device/pci_def.h>
#include <device/pci_ops.h>
static void usb_ehci_init(struct device *dev)
diff --git a/src/southbridge/intel/i82801ix/pcie.c b/src/southbridge/intel/i82801ix/pcie.c
index a199dd12a8..a374068522 100644
--- a/src/southbridge/intel/i82801ix/pcie.c
+++ b/src/southbridge/intel/i82801ix/pcie.c
@@ -3,7 +3,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <device/pciexp.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/intel/i82801ix/smbus.c b/src/southbridge/intel/i82801ix/smbus.c
index 17f7b6b0f1..1ddfb7fe00 100644
--- a/src/southbridge/intel/i82801ix/smbus.c
+++ b/src/southbridge/intel/i82801ix/smbus.c
@@ -4,7 +4,6 @@
#include <device/path.h>
#include <device/smbus.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus_host.h>
diff --git a/src/southbridge/intel/i82801jx/pcie.c b/src/southbridge/intel/i82801jx/pcie.c
index 1d02898688..3ed9d6043b 100644
--- a/src/southbridge/intel/i82801jx/pcie.c
+++ b/src/southbridge/intel/i82801jx/pcie.c
@@ -3,7 +3,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <device/pciexp.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/intel/i82801jx/smbus.c b/src/southbridge/intel/i82801jx/smbus.c
index 6c9df2f357..8fa1914e0d 100644
--- a/src/southbridge/intel/i82801jx/smbus.c
+++ b/src/southbridge/intel/i82801jx/smbus.c
@@ -4,7 +4,6 @@
#include <device/path.h>
#include <device/smbus.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus_host.h>
diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c
index 08f89e3732..fbcb01dc3a 100644
--- a/src/southbridge/intel/ibexpeak/me.c
+++ b/src/southbridge/intel/ibexpeak/me.c
@@ -13,7 +13,6 @@
#include <device/device.h>
#include <device/mmio.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <string.h>
diff --git a/src/southbridge/intel/ibexpeak/pch.c b/src/southbridge/intel/ibexpeak/pch.c
index 958d1db4af..23768edabe 100644
--- a/src/southbridge/intel/ibexpeak/pch.c
+++ b/src/southbridge/intel/ibexpeak/pch.c
@@ -4,7 +4,6 @@
#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include "pch.h"
/* Set bit in function disable register to hide this device */
diff --git a/src/southbridge/intel/ibexpeak/smbus.c b/src/southbridge/intel/ibexpeak/smbus.c
index de1ad1843c..33184580b6 100644
--- a/src/southbridge/intel/ibexpeak/smbus.c
+++ b/src/southbridge/intel/ibexpeak/smbus.c
@@ -4,7 +4,6 @@
#include <device/path.h>
#include <device/smbus.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus_host.h>
diff --git a/src/southbridge/intel/ibexpeak/thermal.c b/src/southbridge/intel/ibexpeak/thermal.c
index 216af67d5b..40df0bd0d6 100644
--- a/src/southbridge/intel/ibexpeak/thermal.c
+++ b/src/southbridge/intel/ibexpeak/thermal.c
@@ -3,7 +3,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pci_ids.h>
#include "pch.h"
#include <device/mmio.h>
diff --git a/src/southbridge/intel/lynxpoint/me.c b/src/southbridge/intel/lynxpoint/me.c
index 91eeabd88e..66d56dc8d2 100644
--- a/src/southbridge/intel/lynxpoint/me.c
+++ b/src/southbridge/intel/lynxpoint/me.c
@@ -15,7 +15,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <device/pci_def.h>
#include <string.h>
#include <delay.h>
#include <elog.h>
diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c
index f83f3f675e..8b037a9dd0 100644
--- a/src/southbridge/intel/lynxpoint/pch.c
+++ b/src/southbridge/intel/lynxpoint/pch.c
@@ -4,7 +4,6 @@
#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include "iobp.h"
#include "pch.h"
diff --git a/src/southbridge/intel/lynxpoint/pcie.c b/src/southbridge/intel/lynxpoint/pcie.c
index 2f01560c0c..7d31b3ea18 100644
--- a/src/southbridge/intel/lynxpoint/pcie.c
+++ b/src/southbridge/intel/lynxpoint/pcie.c
@@ -5,7 +5,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <device/pciexp.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/lynxpoint/pmutil.c b/src/southbridge/intel/lynxpoint/pmutil.c
index dd7f1990b9..d67fb6cd84 100644
--- a/src/southbridge/intel/lynxpoint/pmutil.c
+++ b/src/southbridge/intel/lynxpoint/pmutil.c
@@ -8,7 +8,6 @@
#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_def.h>
#include <console/console.h>
#include <security/vboot/vbnv.h>
#include <security/vboot/vboot_common.h>