summaryrefslogtreecommitdiff
path: root/src/southbridge
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-06-06 09:50:57 +0300
committerFelix Held <felix-coreboot@felixheld.de>2021-10-22 14:18:24 +0000
commit4bab5691cc9369ea3dd8427d1f54a7ae470a35f8 (patch)
tree7e2872dadf0531c499bc6301b43676290cf1cbe8 /src/southbridge
parent682613f0653064eeeba2b4d15f6d50e32a692bd3 (diff)
mb/emulation/qemu-i440fx: Select IOAPIC
For SMP operation IOAPIC needs to be configured. For a build with MAX_CPUS=1 emulation might still decode the IOAPIC MMIO window, it does not really matter to have it always reserved. Change-Id: Ia340fc418cd9ceda56a2a10972e130d9f289c589 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55290 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/i82371eb/isa.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c
index c2411f2b90..5eb1a82d17 100644
--- a/src/southbridge/intel/i82371eb/isa.c
+++ b/src/southbridge/intel/i82371eb/isa.c
@@ -85,13 +85,11 @@ static void sb_read_resources(struct device *dev)
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED |
IORESOURCE_RESERVE;
-#if CONFIG(IOAPIC)
res = new_resource(dev, 3); /* IOAPIC */
res->base = IO_APIC_ADDR;
res->size = 0x00001000;
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED |
IORESOURCE_RESERVE;
-#endif
}
static const struct device_operations isa_ops = {