From 4bab5691cc9369ea3dd8427d1f54a7ae470a35f8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 6 Jun 2021 09:50:57 +0300 Subject: mb/emulation/qemu-i440fx: Select IOAPIC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For SMP operation IOAPIC needs to be configured. For a build with MAX_CPUS=1 emulation might still decode the IOAPIC MMIO window, it does not really matter to have it always reserved. Change-Id: Ia340fc418cd9ceda56a2a10972e130d9f289c589 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/55290 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Angel Pons --- src/southbridge/intel/i82371eb/isa.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c index c2411f2b90..5eb1a82d17 100644 --- a/src/southbridge/intel/i82371eb/isa.c +++ b/src/southbridge/intel/i82371eb/isa.c @@ -85,13 +85,11 @@ static void sb_read_resources(struct device *dev) res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED | IORESOURCE_RESERVE; -#if CONFIG(IOAPIC) res = new_resource(dev, 3); /* IOAPIC */ res->base = IO_APIC_ADDR; res->size = 0x00001000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED | IORESOURCE_RESERVE; -#endif } static const struct device_operations isa_ops = { -- cgit v1.2.3