diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-12 23:07:52 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-06 13:54:30 +0000 |
| commit | cde4f3b2790d52ef38106c7ba91eea5d53e03a93 (patch) | |
| tree | 72d65b1474c3115d336fae45d6a5990638dfaaef /src/southbridge/intel/lynxpoint | |
| parent | a52b93b262582009decf924dbdde9bc1bf856ddb (diff) | |
acpi/gnvs.c: Drop unused pointer to the cbmem console
Change-Id: I7e2018dbccead15fcd84e34df8207120d3a0c57c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64303
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/acpi/globalnvs.asl | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/include/soc/nvs.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl index 754b161af5..01a4d9b73a 100644 --- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl +++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl @@ -90,7 +90,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) S7B1, 32, // 0x9c - D23:F0 Serial IO SDIO BAR1 Offset (0xa0), - CBMC, 32, // 0xa0 - coreboot mem console pointer + , 32, // 0xa0 - coreboot mem console pointer PM1I, 32, // System Wake Source - PM1 Index GPEI, 32, // GPE Wake Source diff --git a/src/southbridge/intel/lynxpoint/include/soc/nvs.h b/src/southbridge/intel/lynxpoint/include/soc/nvs.h index 1996ebab2b..3fe1ee79be 100644 --- a/src/southbridge/intel/lynxpoint/include/soc/nvs.h +++ b/src/southbridge/intel/lynxpoint/include/soc/nvs.h @@ -72,7 +72,7 @@ struct __packed global_nvs { /* LynxPoint Serial IO device BARs */ u32 s0b[8]; /* 0x60 - 0x7f - BAR0 */ u32 s1b[8]; /* 0x80 - 0x9f - BAR1 */ - u32 cbmc; /* 0xa0 - 0xa3 - coreboot memconsole */ + u32 unused_was_cbmc; /* 0xa0 - 0xa3 - coreboot memconsole */ /* Required for future unified acpi_save_wake_source. */ u32 pm1i; |